Datasheet > CS5531_08

CS5531_08

更新时间： 2024-10-30 06:49:27

品牌	Logo	应用领域
凌云 - CIRRUS		/
页数	文件大小	规格书
50页	757K
描述
16-bit and 24-bit ADCs with Ultra-low-noise PGIA

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

CS5531_08 数据手册

CS5531/32/33/34-AS

16-bit and 24-bit ADCs with Ultra-low-noise PGIA

Features

General Description

The CS5531/32/33/34 are highly integrated ∆Σ Analog-

to-Digital Converters (ADCs) which use charge-balance

techniques to achieve 16-bit (CS5531/33) and 24-bit

(CS5532/34) performance. The ADCs are optimized for

measuring low-level unipolar or bipolar signals in weigh

scale, process control, scientific, and medical

applications.

Chopper-stabilized PGIA (Programmable

Gain Instrumentation Amplifier, 1x to 64x)

– 12 nV/√Hz @ 0.1 Hz (No 1/f noise) at 64x

– 1200 pA Input Current with Gains >1

Delta-sigma Analog-to-digital Converter

– Linearity Error: 0.0007% FS

– Noise Free Resolution: Up to 23 bits

To accommodate these applications, the ADCs come as

either two-channel (CS5531/32) or four-channel

(CS5533/34) devices and include a very low noise chop-

per-stabilized instrumentation amplifier (6 nV/√Hz @ 0.1

Hz) with selectable gains of 1×, 2×, 4×, 8×, 16×, 32×, and

64×. These ADCs also include a fourth order ∆Σ modu-

lator followed by a digital filter which provides twenty

selectable output word rates of 6.25, 7.5, 12.5, 15, 25, 30,

50, 60, 100, 120, 200, 240, 400, 480, 800, 960, 1600,

1920, 3200, and 3840 Sps (MCLK = 4.9152 MHz).

Two- or Four-channel Differential MUX

Scalable Input Span via Calibration

– ±5 mV to differential ±2.5V

Scalable V

Input: Up to Analog Supply

REF

Simple Three-wire Serial Interface

– SPI™ and Microwire™ Compatible

– Schmitt Trigger on Serial Clock (SCLK)

To ease communication between the ADCs and a micro-

controller, the converters include a simple three-wire se-

rial interface which is SPI and Microwire compatible with

a Schmitt-trigger input on the serial clock (SCLK).

R/W Calibration Registers Per Channel

Selectable Word Rates: 6.25 to 3,840 Sps

Selectable 50 or 60 Hz Rejection

Power Supply Configurations

– VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V

– VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V

– VA+ = +3 V; VA- = -3 V; VD+ = +3 V

High dynamic range, programmable output rates, and

flexible power supply options makes these ADCs ideal

solutions for weigh scale and process control

applications.

ORDERING INFORMATION

See page 47

VA+

VREF+ VREF-

VD+

AIN1+

AIN1-

AIN2+

AIN2-

DIFFERENTIAL

^THORDER ∆Σ

MODULATOR

PGIA

1,2,4,8,16

32,64

PROGRAMMABLE

SINC FIR FILTER

SDI

SERIAL

INTERFACE

SDO

MUX

SCLK

(CS5533/34

SHOWN)

AIN3+

AIN3-

CLOCK

GENERATOR

CALIBRATION

SRAM/CONTROL

LOGIC

LATCH

AIN4+

AIN4-

VA-

A0/GUARD

OSC1

OSC2

DGND

OCT ‘08

DS289F5

http://www.cirrus.com

12 3 4 5 6 7...50

中文翻译

下载PDF

与CS5531_08相关器件

型号	品牌	获取价格	描述	数据表
CS5531-AS	CIRRUS	获取价格	16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
CS5531-AS-R	CIRRUS	获取价格	暂无描述
CS5531-ASZ	CIRRUS	获取价格	16-bit and 24-bit ADCs with Ultra-low-noise PGIA
CS5531-ASZ-R	CIRRUS	获取价格	ADC, Delta-Sigma, 16-Bit, 1 Func, 2 Channel, Serial Access, PDSO20, 0.200 INCH, LEAD FREE,
CS5532	CIRRUS	获取价格	16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
CS5532-AS	CIRRUS	获取价格	16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
CS5532-ASZ	CIRRUS	获取价格	16-bit and 24-bit ADCs with Ultra-low-noise PGIA
CS5532-BS	CIRRUS	获取价格	16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
CS5532-BSZ	CIRRUS	获取价格	24-bit ΔΣ ADCs with Ultra-low-noise PGIA
CS5533	CIRRUS	获取价格	16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA

与CS5531_08相关文章

三星深化印度制造布局，供应链本地化进程加速
2024-10-29

19
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

20
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
2024-10-18

45
意法半导体发布第四代SiC技术，助力电动汽车电驱
2024-10-15

52

产品中心

服务支持

精选活动

关于我们

帮助中心

CS5531_08

CS5531_08 数据手册

与CS5531_08相关器件

与CS5531_08相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CS5531_08

CS5531_08 数据手册

与CS5531_08相关器件

与CS5531_08相关文章

您还可以找

您在本页遇到什么问题？