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CS5512 PDF预览

CS5512

更新时间: 2024-02-17 16:26:22
品牌 Logo 应用领域
凌云 - CIRRUS /
页数 文件大小 规格书
26页 217K
描述
16-bit and 20-bit, 8-pin ΔΣ ADCs

CS5512 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP8,.3针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:2.19
最大模拟输入电压:2.2 V最小模拟输入电压:1.8 V
转换器类型:ADC, DELTA-SIGMAJESD-30 代码:S-PDSO-G8
JESD-609代码:e3长度:5.28 mm
最大线性误差 (EL):0.0015%湿度敏感等级:3
模拟输入通道数量:1位数:20
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出位码:2'S COMPLEMENT BINARY输出格式:SERIAL
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.3封装形状:SQUARE
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
采样速率:0.000326 MHz座面最大高度:2.13 mm
子类别:Analog to Digital Converters标称供电电压:5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:5.28 mm
Base Number Matches:1

CS5512 数据手册

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CS5510/11/12/13  
16-bit and 20-bit, 8-pin ΔΣ ADCs  
Features  
General Description  
The CS5510/11/12/13 are low-cost, easy-to-use, ΔΣ an-  
alog-to-digital converters (ADCs) which use charge-  
balance techniques to achieve 16-bit (CS5510/11) and  
20-bit (CS5512/13) performance. The ADCs are avail-  
able in a space-efficient, 8-pin SOIC package and are  
optimized for measuring signals in weigh scale, process  
control, and other industrial applications.  
Delta-sigma Analog-to-digital Converter  
– Linearity Error: 0.0015% FS  
– Noise-free Resolution: Up to 17 Bits  
Differential Bipolar Analog Inputs  
V  
Input Range from 250 mV to 5 V  
REF  
To accommodate these applications, the ADCs include  
a fourth-order ΔΣ modulator and a digital filter. When  
configured with an external master clock of 32.768 kHz,  
the filter in the CS5510/12 provides better than 80 dB of  
simultaneous 50 and 60 Hz line rejection, and outputs  
conversion words at 53.5 Sps. The CS5511/13 include  
an on-chip oscillator which eliminates the need for an ex-  
ternal clock source.  
50/60 Hz Simultaneous Rejection  
(CS5510/12)  
16 to 326 Sps Output Word Rate  
On-chip Oscillator (CS5511/13)  
Power Supply Configurations:  
– V+ = 5 V, V- = 0 V  
– Multiple Dual-supply Arrangements  
Low-power, flexible supply configurations, compact pi-  
nout, and ease of use make these products ideal  
solutions for cost-conscience and space-constrained  
applications.  
Low Power Consumption  
– Normal Mode, 2.5 mW  
– Sleep Mode, 10 μW  
Low-cost, Compact, 8-pin Package  
Lead-free Device Package Options  
ORDERING INFORMATION  
See page 23.  
V+  
AIN+  
1X  
Differential  
CS  
AIN-  
4th-order  
Delta-sigma  
Modulator  
Digital Filter  
Output  
VREF  
Control  
SDO  
Logic  
~0.8X  
SCLK  
Oscillator  
(CS5511/13 only)  
Clock  
Gen.  
(CS5510/12 only)  
V-  
JUL ‘09  
DS337F4  
Copyright Cirrus Logic, Inc. 2009  
http://www.cirrus.com  
(All Rights Reserved)  

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