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CS53L32A-KZZ PDF预览

CS53L32A-KZZ

更新时间: 2024-11-13 23:16:27
品牌 Logo 应用领域
凌云 - CIRRUS 转换器光电二极管
页数 文件大小 规格书
40页 720K
描述
Low Voltage, Stereo A/D Converter

CS53L32A-KZZ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP20,.25
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.76最大模拟输入电压:3.6 V
转换器类型:ADC, DELTA-SIGMAJESD-30 代码:R-PDSO-G20
长度:6.5 mm湿度敏感等级:3
模拟输入通道数量:2位数:24
功能数量:1端子数量:20
最高工作温度:70 °C最低工作温度:-10 °C
输出位码:2'S COMPLEMENT BINARY输出格式:SERIAL
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:1.8/3.3 V
认证状态:Not Qualified采样速率:0.192 MHz
座面最大高度:1.1 mm子类别:Analog to Digital Converters
标称供电电压:3 V表面贴装:YES
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

CS53L32A-KZZ 数据手册

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CS53L32A  
Low Voltage, Stereo A/D Converter  
FEATURES  
DESCRIPTION  
The CS53L32A is a highly integrated, 24-bit, 96 kHz au-  
dio ADC providing stereo analog-to-digital converters  
using delta-sigma conversion techniques. This device in-  
cludes volume control and line level inputs in a 20-pin  
TSSOP package.  
z 20-Pin TSSOP package  
z 1.8 V to 3.3 V supply  
z 24-bit conversion / 96 kHz sample rate  
z 98 dB dynamic range at 3 V supply  
z -88 dBFS THD+N  
The CS53L32A is based on delta-sigma modulation al-  
lowing infinite adjustment of the sample rate between  
2 kHz and 100 kHz simply by changing the master clock  
frequency.  
z Low power consumption  
– 11 mW at 1.8 V  
z Up to 32 dB gain  
The CS53L32A contains adjustable analog gain, a 2:1  
input mux, and digital attenuation.  
– 20 dB gain step  
– 12 dB variable input gain, 1 dB steps  
– Changes made at zero crossings  
z Stereo inputs  
z Digital volume control  
– 96 dB attenuation, 1 dB step size  
– Mute  
The CS53L32A operates from a +1.8 V to +3.3 V supply.  
These features are ideal for portable MP3 players, MD  
recorders/players, digital camcorders, PDAs, set-top  
boxes, and other portable systems that require extreme-  
ly low power consumption in a minimum of space.  
– Soft ramping  
ORDERING INFORMATION  
z 2:1 Input mux  
CS53L32A-KZ  
20-pin TSSOP  
-10 to 70 °C  
CS53L32A-KZZ 20-pin TSSOP  
-10 to 70 °C Lead free  
-40 to 85 °C  
CS53L32A-BZ  
CDB53L32A  
20-pin TSSOP  
Evaluation Board  
I
I
SCL/CCLK/  
SDA/CDIN/DIF  
AD0/CS/DIV  
ChSEL  
RST  
VA  
Control Port  
VL  
AIN_L1  
Gain  
Gain  
Attenuator  
0-96 dB  
LRCK  
ADC  
ADC  
Digital  
Filters  
AIN_L2  
AIN_R1  
SCLK  
Attenuator  
0-96 dB  
SDOUT  
AIN_R2  
GND  
VQ  
MCLK  
FILT+ REF_GND  
AFLTL  
AFLTR  
Copyright © Cirrus Logic, Inc. 2004  
OCT ‘04  
DS513F1  
http://www.cirrus.com  
(All Rights Reserved)  

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