Datasheet > CS53L30

CS53L30

更新时间： 2024-09-27 01:23:59

品牌	Logo	应用领域
凌云 - CIRRUS		/
页数	文件大小	规格书
67页	3328K
描述
Low-Power Quad-Channel Microphone ADC with TDM Output

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CS53L30 数据手册

CS53L30

Low-Power Quad-Channel Microphone ADC with TDM Output

Analog Input and ADC Features

System Features

. 91-dB dynamic range (A-weighted) @ 0-dB gain

. –84-dB THD+N @ 0-dB gain

. Native (no PLL required) support for 6-/12-MHz, 6.144-/

12.288-MHz, 5.6448-/11.2896-MHz, or 19.2-MHz master

clock rates and 8- to 48-kHz audio sample rates

. Four fully differential inputs: Four analog mic/line inputs

. Four analog programmable gain amplifiers

. –6 to +12 dB, in 0.5-dB steps

. Master or Slave Mode. Clock dividers can be used to

generate common audio clocks from single-master clock

input.

. Low power consumption

. +10 or +20 dB boost for mic input

. Less than 4.5-mW stereo (16 kHz) analog mic record

. Less than 2.5-mW mono (8 kHz) analog mic record

. Selectable mic bias and digital interface logic voltages

. High-speed (400-kHz) I²C control port

. Four mic bias generators

. MUTE pin for quick mic mute and programmable quick

power down

Digital Processing Features

. Available in 30-ball WLCSP and 32-pin QFN

. Volume control, mute, programmable high-pass filter,

noise gate

Applications

. Two digital mic (DMIC) interfaces

Digital Output Features

. Two DMIC SCLK generators

. Voice-recognition systems

. Advanced headsets and telephony systems

. Voice recorders

. Digital cameras and video cameras

. Four-channel I S output or TDM output. Four CS53L30s

can be used to output 16 channels of 24-bit 16-kHz

sample rate data on a single TDM line.

CS53L30

LDO

Digital Processing

IN1+/DMIC1_SD

IN1–

–

ADC1A

HPF, Noise

–

Gate, Volume,

Mute

IN2+

IN2–

–

ADC1B

–

–6 to +12 dB,

0.5 dB steps

+10 or +20 dB

MCLK_INT

IN3+/DMIC2_SD

IN3–

–

ADC2A

–

HPF, Noise

Gate, Volume,

Mute

IN4+

IN4–

–

ADC2B

–

Synchronous

SRC

–6 to +12 dB,

0.5 dB steps

+10 or +20 dB

MCLK_INT

MIC 1_BIAS

MIC 2_BIAS

MIC3_BIAS

MIC4_BIAS

MIC1 Bias

MIC2 Bias

MIC3 Bias

MIC4 Bias

Control Port

Clock Divider

Synchronizer

Audio

Serial Port

DMIC

Level Shifters

SYNC

MCLK

RESET

DMIC1_SCLK

Control

Port

Serial Port

DMIC2_SCLK

MUTE

DS992F2

MAR '15

http://www.cirrus.com

12 3 4 5 6 7...67

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