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CS5321

更新时间: 2024-11-15 22:40:19
品牌 Logo 应用领域
凌云 - CIRRUS 转换器
页数 文件大小 规格书
38页 757K
描述
24-Bit Variable Bandwidth A/D Converter Chipset

CS5321 数据手册

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CS5320/21/22  
24-Bit Variable Bandwidth A/D Converter Chipset  
Features  
Description  
The CK5320 and CK5321 Chipsets function as a unique  
A/D converter intended for very high resolution measure-  
ment of signals below 1500 Hz. The CK5320 Chipset is  
a cost effective commercial grade solution for applica-  
tions which require a high dynamic range A/D converter.  
The chipsets perform sampling, A/D conversion, and  
anti-alias filtering.  
l CMOS A/D Converter Chipset  
l Dynamic Range  
- 130 dB @ 25 Hz Bandwidth  
- 121 dB @ 411 Hz Bandwidth  
l Delta-Sigma Architecture  
- Fourth-Order Modulator  
The CS5320 and CS5321 use Delta-Sigma modulation  
to produce highly accurate conversions. The ∆Σ modula-  
tor oversamples, virtually eliminating the need for  
external analog anti-alias filters. The CS5322 linear-  
phase FIR digital filter decimates the output to any one  
of seven selectable update periods: 16, 8, 4, 2, 1, 0.5  
and 0.25 milliseconds. Data is output from the digital fil-  
ter in a 24-bit serial format.  
- Variable Oversampling: 64X to 4096X  
- Internal Track-and-Hold Amplifier  
l CS5321 Signal-to-Distortion: 115 dB  
l Clock Jitter Tolerant Architecture  
l Input Voltage Range: +4.5 V  
l Flexible Filter Chip  
- Hardware or Software Selectable Options  
ORDERING INFORMATION*  
- Seven Selectable Filter Corners (-3 dB)  
Frequencies: 25, 51, 102, 205, 411, 824 and  
1650 Hz  
Chip Sets  
Kits  
CS5320-KL & CS5322-KL CK5320-KL1  
CS5321-BL & CS5322-KL CK5321-KL1  
CS5321-BL & CS5322-BL CK5321-BL1  
l Low Power Dissipation: <100 mW  
* Refer to Table 5  
CS5320/21  
CS5322  
V
V
V
V
ss2  
VD+  
SYNC CLKIN CS R/W  
dd1  
ss1  
dd2  
LPWR  
OFST  
RESET  
RSEL  
SCLK  
SID  
MSYNC  
SOD  
MFLG  
MCLK  
MDATA  
AINR  
AIN+  
Digital  
Filter  
ERROR  
DRDY  
ORCAL  
DECA  
DECB  
DECC  
Analog  
Modulator  
AIN-  
MDATA  
HBR  
VD+  
DGND  
CSEL  
VREF+  
VREF-  
AGND  
DGND  
H/S TDATA PWDN USEOR DGND  
This document contains information for a new product.  
Cirrus Logic reserves the right to modify this product without notice.  
Preliminary Product Information  
OCT ‘99  
DS454PP1  
Copyright Cirrus Logic, Inc. 1999  
P.O. Box 17847, Austin, Texas 78760  
(512) 445 7222 FAX: (512) 445 7581  
http://www.cirrus.com  
(All Rights Reserved)  
1

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