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CS4922-CL

更新时间: 2024-09-28 22:25:23
品牌 Logo 应用领域
凌云 - CIRRUS 解码器
页数 文件大小 规格书
34页 644K
描述
MPEG/G.729A AUDIO DECODER SYSTEM

CS4922-CL 数据手册

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CS4922  
MPEG/G.729A Audio Decoder System  
Features  
Description  
The CS4922 is a complete audio decompression sub-  
system implemented in a single high integration mixed  
signal CMOS chip. The CS4922 has been widely used  
in direct broadcast system set-top boxes and proprietary  
embedded systems which pull compressed audio from  
local system memory.  
l DSP Optimized for Audio Decode, 24-bit  
Fixed Point w/48-bit Accumulator  
l On-Chip Functional Blocks Include:  
- DSP with RAM and ROM Memories  
- CD Quality Stereo DAC with Output Filtering  
- Mono Output & Digital Volume Control  
The CS4922 is tailored to include the necessary hard-  
ware and firmware to ensure proper audio/video  
synchronization for MPEG-2 audio decompression. In  
addition to audio decoding this programmable DSP solu-  
tion provides robust error concealment and feature  
implementations like ancillary data support and PCM  
synthesis.  
- S/PDIF Transmitter, Bidirectional PCM Audio  
Port  
- Internal Phase Locked Loop for Clocking  
- Dedicated Compressed Serial Input Interface  
l MPEG-1 & MPEG-2 Layers 1 & 2 With All  
Sample/Bit Rates and Ancillary Data Support.  
l MPEG-1 & MPEG-2 Packetized Audio  
Stream and Elementary Stream Input  
l G.729A Audio Decode  
The CS4922 can also support the decode of other com-  
pression standards such as G.729A with a separate  
download image. The flexible architecture of the CS4922  
provides the ability to mix compressed audio with data  
from the auxiliary PCM port.  
l PCM Synthesis for Auxiliary Audio  
l Pin Compatibility with CS4920A and Primary  
Feature/Firmware Compatible  
l +5 Volt Only CMOS, 44 pin PLCC  
ORDERING INFORMATION  
CS4922-CL  
44-pin PLCC  
CDB4922  
Evaluation Board  
VD1  
VD4  
SCK/SCL SDA/CDOUT CDIN CS REQ  
VA+  
Serial Control Port (SPI or I2C)  
Stereo DAC  
AUXLR  
AUXIN  
AUXOUT  
AUXCLK  
Auxiliary  
Serial Audio  
Port  
AOUTM  
AOUTL  
AOUTR  
Serial  
Audio  
Port  
FSYNC  
SCLK  
SDATA  
DSP  
AES/EBU - S/PDIF  
TX  
Transmitter  
RESET  
90_CLK  
BOOT  
PIO  
XF1  
XF2  
XF3  
XF4  
Programmable  
IO/ Pins  
33 bit Counter  
PLL  
+
Clock Manager  
DGND1  
DGND4 FLT CLKIN EXTCK ALTCLK CLKOUT AGND1 AGND2  
This document contains information for a new product.  
Cirrus Logic reserves the right to modify this product without notice.  
Preliminary Product Information  
Copyright Cirrus Logic, Inc. 1999  
(All Rights Reserved)  
JUL ‘99  
DS227PP2  
P.O. Box 17847, Austin, Texas 78760  
(512) 445 7222 FAX: (512) 445 7581  
http://www.cirrus.com  
1

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