Datasheet > CS48540

CS48540

更新时间： 2024-09-30 15:19:51

品牌	Logo	应用领域
凌云 - CIRRUS		/
页数	文件大小	规格书
23页	369K
描述
高性能、低成本的 32 位音频处理器

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中文翻译

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CS48540 数据手册

CS485xx

CS485xx Family Data Sheet

Differentiating from the legacy Cirrus multi-standard, multi-channel

decoders, this new CS485xx family is still based on the same

high-performance 32-bit fixed point Digital Signal Processor core

but instead is equipped with much less memory, tailoring it for more

cost-effective applications associated with multi-channel and

virtual-channel sound enhancements. Target applications are:

Features

. Cost-effective, High-performance 32-bit DSP

. 300,000,000 MAC/S (multiply accumulates per second)

. Dual MAC cycles per clock

. 72-bit accumulators are the most accurate in the industry

. 24k x 32 SRAM, 2k blocks - assignable to data or program

. Digital Televisions

. Multimedia Peripherals

. Internal ROM contains a variety of configurable sound

. iPod Docking Stations

enhancement feature sets

. Automotive Head Units

. 8-channel internal DMA

. Automotive Outboard Amplifiers

. Internal watch-dog DSP lock-up prevention

. DSP Tool Set w/ Private Keys for Protecting Customer IP

™

. HD-DVD and Blu-ray Disc DVD Receivers

. PC Speakers

. Configurable Serial Audio Inputs/Outputs

There are also a wide variety of licensable DSP codes available

today as seen by the following examples:

. Configurable for all input/output types

. Maximum 32-bit @ 192 kHz

. Supports 32-bit audio sample I/O between DSP chips

. TDM input modes (multiple channels on same line)

. 192 kHz SPDIF transmitter

. Multi-channel DSD direct stream digital SACD input

. Supports Two Different Input Fs Sample Rates

. Output can be master or slave

Cirrus also has developed, or is developing their own royalty-free

versions of popular features sets like Cirrus Bass Manager, Cirrus

Dynamic Volume Leveler, Cirrus Original Multichannel Surround,

Cirrus Virtual Speaker & Cirrus 3D-Audio.

. Dual processing path capability

. Input supports dual domain slave clocking

. Hardware assist time sampling for sample rate conversion

. Integrated Clock Manager/PLL

The CS485xx family is programmed using the Cirrus proprietary

™

DSP Composer GUI development tool. Processing chains may be

. Can operate from external crystal, external oscillator

. Input Fs Auto Detection

designed using a drag-and-drop interface to place/utilize functional

macro audio DSP primitives. The end result is a software image that

is down-loaded to the DSP via serial host or serial boot modes.

. Host & Boot via Serial Interface

See Section 6 for ordering information.

. Configurable GPIOs and External Interrupt Input

. 1.8V Core and a 3.3V I/O that is tolerant to 5V input

. Low-power Mode

. “Energy Star Ready” in low-power mode, 268 µW in standby

Serial

Control 1

GPIO

Debug

12 Ch. Audio In /

6 Ch. SACD In

Watchdog

TMR1

32-bit

DSP

TMR2

S/PDIF

12 Ch PCM

Audio Out

PLL

CS485xx Block Diagram

DS734F5

OCT '11

http://www.cirrus.com

12 3 4 5 6 7...23

中文翻译

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与CS48540相关器件

型号	品牌	获取价格	描述	数据表
CS48540-CQZ	CIRRUS	获取价格	32-bit Audio Decoder DSP Family
CS48540-DQZ	CIRRUS	获取价格	32-bit Audio Decoder DSP Family
CS48560	CIRRUS	获取价格	高性能、低成本的 32 位音频处理器
CS48560-CQZ	CIRRUS	获取价格	32-bit Audio Decoder DSP Family
CS48560-CQZR	CIRRUS	获取价格	暂无描述
CS48560-DQZ	CIRRUS	获取价格	32-bit Audio Decoder DSP Family
CS485XX	CIRRUS	获取价格	32-bit Audio Decoder DSP Family
CS4-88	SUPERWORLD	获取价格	POWER TRANSFORMER
CS48AU2B	CIRRUS	获取价格	Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology
CS48AU2B-CQZ	CIRRUS	获取价格	Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology

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