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CS4815 PDF预览

CS4815

更新时间: 2024-09-29 04:06:51
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3页 181K
描述
OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC

CS4815 数据手册

 浏览型号CS4815的Datasheet PDF文件第2页浏览型号CS4815的Datasheet PDF文件第3页 
RUBICON-48  
Product Brief  
Part Number S4815PBI, Revision 2.2, May 2006  
OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC  
Industry Standard RS(255,239) Forward Error Correction with  
6.2 dB Coding Gain (at 10-15 CER)  
G.709 Compliant Frame Structure.  
FEATURES  
Easy software migration from industry leading AMCC  
NIAGARA FEC device  
• Compatible with AMCC’s S19203 (HUDSON) and S19208  
(NIAGARA).  
• Significant reuse of the Niagara register map in Rubicon.  
• Superb migration path to lower power Rubicon-48 device.  
• Limited backwards compatibility with AMCC’s S3062.  
Backwards compatible with AMCC’s industry leading  
S3062 FEC device  
• FEC and Framing compatible between Rubicon-48 and S3062.  
Enhanced Gain Forward Error Correction with G.709 ODU  
• 2.7 Gbps enhanced FEC with > 8.6 dB coding gain.  
G.709 overhead processing and nominal rate expansion.  
• Comprehensive channel statistics gathering including.  
• Corrected bits, bytes.  
• Superb migration path to better integration Rubicon-48 device.  
G.709 ODU - 1 Synchronous and Asynchronous mapping  
• 1 x OC – 48/STM-16 synchronous and asynchronous mapping  
(239,238).  
• Corrected zeros, ones (with outputs).  
• Uncorrectable sub-frame count.  
G.709 Overhead processing  
• Bi-directional add-drop ODU – 1.  
Broad Interface Compatibility  
• 16-bit 155Mbps LVDS interface  
• Bi-direction G.709 Overhead Processing for bi-directional  
OTU1 regeneration.  
• 4-bit 622Mbps LVDS interface  
• Dedicated GCC ports.  
• Compatible with AMCC’s DANUBE, MISSOURI, OHIO,  
RHINE, VOLTA, S3465, S3457, S3455, S3086 and S3485.  
Ingress and Egress SONET/SDH Performance Monitoring/  
Injection  
• 1 x OC-/48/12/3 TOH add-drop and processing.  
• Provides port swapping and output dual feed features for 1 + 1  
line protection scheme.  
• 8B/10B Monitoring.  
Support For System Test and Diagnostics  
• SONET/SDH section and line termination including full B2  
recalculation.  
• Can synthesize SONET frames.  
• Error injection capability for verification of remote error report-  
ing.  
• TOH add-drop port.  
• LOS, OOF, LOF detection.  
Test-set compliant pseudo-random sequence generation/anal-  
ysis.  
• B1, B2 monitoring with programmable Signal Degrade and Sig-  
nal Fail thresholds.  
• Client and Line side loopback.  
• J0 Monitoring, SDH and SONET modes.  
• Support for Protection Switching.  
General Purpose Processor Interface  
• Glueless 16-bit interface to MPC860, 25 MHz to 66 MHz. Dual  
mode interface also supports Intel processors.  
• K1, K2 monitoring for APS changes, line AIS and line RDI.  
• Automatic, interrupt-driven, or manual AIS insertion.  
• Frame boundary output.  
• Interrupt driven or Polled mode operation.  
Figure 1: Block Diagram  
In g r e s s /E g r e s s  
O D U -1 O H  
A d d /D r o p  
In g r e s s E g r e s s  
S O N E T /S D H  
T O H A d d /D r o p  
O T N N e tw o r k /L in e  
In te r fa c e  
C lie n t o r O T N  
In te r fa c e  
P a tte rn  
R -S  
F E C  
E n c o d e r  
E F E C  
D e c o d e r  
P N g e n  
E rr In s  
P M  
&
E rr  
A n a ly s is  
B Y P A S S  
Y P A S S  
B Y P A S S  
B Y P A S S  
B Y P A S S  
B Y P A S S  
R -S  
F E C  
D e c o d e rA n a ly s is  
P a tte rn  
P N g e n E F E C  
E rr In s E n c o d e r  
&
E rr  
P M  
R e g is teIrn te rru p t  
M a p C o n tro l  
S F I-4 (2 .7  
G b p s )  
S F I-4  
(2 .7 G b p s )  
1 6
u P I/F  
FINAL Information - The information contained in this document is  
about a product that has been fully tested, characterized, and is pro-  
duction release. All features described herein are supported. Contact  
AMCC for updates to this document and the latest product status.  
Empowering Intelligent Optical Networks  

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