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CS47024C-DQZ PDF预览

CS47024C-DQZ

更新时间: 2024-11-16 06:49:27
品牌 Logo 应用领域
凌云 - CIRRUS 微控制器和处理器外围集成电路数字信号处理器时钟
页数 文件大小 规格书
40页 655K
描述
Audio SOC Processor Family

CS47024C-DQZ 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:QFP包装说明:HLFQFP,
针数:100Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:2.28
Is Samacsys:N地址总线宽度:
桶式移位器:NO边界扫描:NO
最大时钟频率:24.576 MHz外部数据总线宽度:
格式:FIXED POINT内部总线架构:MULTIPLE
JESD-30 代码:S-PQFP-G100长度:14 mm
低功率模式:YES湿度敏感等级:3
端子数量:100最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HLFQFP封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压:1.89 V最小供电电压:1.71 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

CS47024C-DQZ 数据手册

 浏览型号CS47024C-DQZ的Datasheet PDF文件第2页浏览型号CS47024C-DQZ的Datasheet PDF文件第3页浏览型号CS47024C-DQZ的Datasheet PDF文件第4页浏览型号CS47024C-DQZ的Datasheet PDF文件第5页浏览型号CS47024C-DQZ的Datasheet PDF文件第6页浏览型号CS47024C-DQZ的Datasheet PDF文件第7页 
CS470xx Data Sheet  
The CS470xx family is a new generation of audio system-on-  
a-chip (ASOC) processors targeted at high fidelity, cost  
sensitive designs. Derived from the highly successful  
CS48500 32-bit fixed point audio enhancement processor  
family, the CS470xx further simplifies system design and  
reduces total system cost by integrating the S/PDIF Rx,  
S/PDIF Tx, analog inputs, analog outputs, and SRCs. For  
example, a hardware SRC can down-sample a 192 kHz  
S/PDIF stream to a lower Fs to reduce memory and MIPS  
requirements for processing. This integration effectively  
reduces the chip count from 3 to 1 which allows smaller, less  
expensive board designs.  
FEATURES  
‰ Cost-effective, High-performance 32-bit DSP  
300,000,000 MAC/S (multiply accumulates per second)  
Dual MAC cycles per clock  
72-bit accumulators are the highest precision in the industry  
32K x 32-bit SRAM with three 2K blocks assignable to either  
Y data or program memory  
‰ Integrated DAC & ADC Functionality  
8 Channels of DAC output: 108dB DR, -98dB THD+N  
4 Channels of ADC input: 105dB DR, -98dB THD+N  
Target applications are:  
Integrated 5:1 analog mux feeds one stereo ADC  
— Automotive Head Units & Outboard Amplifiers  
— Automotive Processors & Automotive Integration Hubs  
— Digital TV  
— MP3 Docking Stations  
— AVR and DVD RX  
‰ Configurable Serial Audio Inputs/Outputs  
Integrated 192 kHz S/PDIF Rx  
Integrated 192 kHz S/PDIF Tx  
Supports 32-bit Serial Data @ 192 kHz  
Supports 32-bit audio sample I/O between DSP chips  
— DSP Controlled Speakers (e.g. Subwoofers, Sound  
Bars)  
TDM I/O modes (Up to 10/8 channels per line)  
‰ Supports Different Fs Sample Rates  
The CS470xx is programmed using the simple yet powerful  
Cirrus proprietary DSP ComposerGUI development and  
pre-production tuning tool. Processing chains may be  
designed using a drag-and-drop interface to place/utilize  
functional macro audio DSP primitives and custom audio  
filtering blocks. The end result is a software image that is  
downloaded to the DSP via serial control port.  
Three integrated hardware SRC blocks  
Output can be master or slave  
2
Supports dual-domain Fs on S/PDIF vs. I S inputs  
‰ DSP Tool Set w/ Private Keys Protect Customer IP  
‰ Integrated Clock Manager/PLL  
The Cirrus Frameworkprogramming environment offers  
Assembly and C language compilers and other software  
development tools for porting existing code to the CS470xx  
family platform.  
Flexibility to operate from internal PLL, external crystal,  
external oscillator  
‰ Input Fs Auto Detection w/ µC Acknowledgement  
‰ Host Control & Boot via I2Cor SPISerial Interface  
‰ Configurable GPIOs and External Interrupt Input  
‰ 1.8V Core and a 3.3V I/O that is tolerant to 5V input  
‰ Low-power Mode  
The CS470xx is available in a 100-pin LQFP package with  
exposed pad for better thermal characteristics. Both  
Commercial (0°C to +70°C) and Automotive (-40°C to  
+85°C) temperature grades.  
Ordering Information:  
See p. 33 for ordering information.  
Feature may differ on CS47024 or CS47028, see p. 8.  
ADC’s & DAC’s operate  
in Single ended or  
Differential mode  
Clock  
Manager  
DBC  
PLL  
Timers GPIO  
(I2C Slave)  
DAC0  
DAC1  
DAC2  
DAC3  
DAC4  
DAC5  
DAC6  
DAC7  
I2S /  
TDM /  
SPDIF  
S
R
C
2
8ch  
x4  
I2S /  
TDM  
Crystal® 32-bit Core  
in the CS47048 DSP  
S
R
C
3
SRC3 has 8  
independent Channels  
for In or Out  
x8  
ADC0/1  
8ch  
DMA  
S
R
C
1
ROM  
Stereo Inputs  
On Analog in  
X
4ch  
RAM  
PIC  
x2  
ROM  
RAM  
I2S / TDM  
ADC2/3  
ROM  
RAM  
Y
P
x2  
SPI / I2C  
Control  
I2S / TDM /  
SPDIF  
32K x 32-bit SRAM with three 2K blocks  
Assignable to Program or Y Data memory  
This document contains information for a new product.  
Cirrus Logic reserves the right to modify this product without notice.  
Preliminary Product Information  
Copyright 2009 Cirrus Logic  
CONFIDENTIAL  
AUG ’09  
DS787PP1  
http://www.cirrus.com  

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