CS2200-CP
Fractional-N Frequency Synthesizer
Features
General Description
Delta-Sigma Fractional-N Frequency Synthesis
The CS2200-CP is an extremely versatile system clock-
ing device that utilizes a programmable phase lock loop.
The CS2200-CP is based on an analog PLL architec-
–
Generates a Low Jitter 6 - 75 MHz Clock
from an 8 - 75 MHz Reference Clock
ture comprised of
a
Delta-Sigma Fractional-N
Highly Accurate PLL Multiplication Factor
Maximum Error Less Than 1 PPM
Frequency Synthesizer. This architecture allows for fre-
quency synthesis and clock generation from a stable
reference clock.
–
I²C™ / SPI™ Control Port
Configurable Auxiliary Output
The CS2200-CP supports both I²C and SPI for full soft-
ware control.
–
–
–
Buffered Reference Clock
PLL Lock Indication
Duplicate PLL Output
The CS2200-CP is available in a 10-pin MSOP package
in Commercial (-10 °C to +70 °C) grade.
Flexible Sourcing of Reference Clock
Customer development kits are also available for device
evaluation. Please see “Ordering Information” on
page 25 for complete details.
–
–
External Oscillator or Clock Source
Supports Inexpensive Local Crystal
Minimal Board Space Required
–
No External Analog Loop-filter
Components
3.3 V
Timing Reference
PLL Output
I²C/SPI Software
Control
Auxiliary
Output
I²C / SPI
PLL Lock Indicator
8 MHz to 75 MHz
Low-Jitter Timing
Reference
Phase
Comparator
Internal
Loop Filter
Voltage Controlled
Oscillator
6 to 75 MHz
PLL Output
Fractional-N
Divider
N
Delta-Sigma
Modulator
Output to Input
Clock Ratio
Copyright Cirrus Logic, Inc. 2009
AUG '09
DS759F1
(All Rights Reserved)
http://www.cirrus.com