CPZ52R-CFTVS5V0BULC
Low Capacitance TVS Die
5.0 Volt
www.centralsemi.com
The CPZ52R-CFTVS5V0BULC is a silicon, low capacitance transient voltage suppressor designed
to protect sensitive equipment connected to high speed data lines against ESD damage. In order
to accomplish bi-directional functionality, two CPZ52R-CFTVS5V0BULC die must be configured
back-to-back (Cathode-to-Cathode).
MECHANICAL SPECIFICATIONS:
Die Size
14.2 x 11 MILS
3.9 MILS
Die Thickness
Cathode Bonding Pad Size
Top Side Metalization
Back Side Metalization
Scribe Alley Width
Wafer Diameter
3.15 x 3.15 MILS
Al-Si – 30,000Å
Au – 9,000Å
1.97 MILS
6 INCHES
Gross Die Per Wafer
136,207
MAXIMUM RATINGS: (T =25°C)
SYMBOL
UNITS
W
A
Peak Power Dissipation (8x20μs)
Electrical Fast Transient (IEC 61000-4-4) (5x50ns)
ESD Voltage (IEC 61000-4-2, Air)
ESD Voltage (IEC 61000-4-2, Contact)
Operating Junction Temperature
Storage Temperature
P
14
40
PK
EFT
A
V
20
kV
ESD
ESD
V
20
kV
T
-55 to +125
-55 to +150
°C
J
T
°C
stg
ELECTRICAL CHARACTERISTICS PER BACK-TO-BACK TVS PAIR: (T =25°C)
A
Maximum
Reverse Breakdown Test
Stand-off
Voltage
Maximum
Reverse
Current Leakage
Current
Maximum
Clamping
Voltage
Typical
TLP Clamping Dynamic
Typical
Typical
Junction
Maximum
Junction
Voltage
Voltage
(Note 1)
Resistance Capacitance Capacitance
(Note 1)
(8x20μs)
@ 0V Bias @ 0V Bias
V
V
I
I
I
@ V
V
@
I
V
@
I
R
C
C
J
@
RWM
BR
T
T
R
RWM
C
V
PP
CL
V
PP
DYN
J
MIN MAX
V
mA
nA
A
A
Ω
pF
pF
V
V
15
20
1.6
3.3
5.0
6.0
10
1.0
100
14
1.0
2.94
0.2
0.35
Note 1: Transmission Line Pulse (TLP) conditions: Z =50Ω, tp=100ns
0
R0 (17-February 2017)