Not for New Designs
CPC7582
Line Card Access Switch
Features
Description
• Small 16-pin SOIC and 16-pin DFN
• DFN package printed-circuit board footprint is 60
percent smaller than the SOIC version, 70 percent
The CPC7582 is a monolithic solid-state switch in a
16-pin SOIC or DFN surface-mount package. It
provides the necessary functions to replace two
2-Form-C electro-mechanical relays on traditional
analog and integrated voice and data (IVD) line cards
found in Central Office, Access, and PBX equipment.
The device contains solid state switches for tip and
ring line break, ringing injection/ringing return and test
access. The CPC7582 requires only a +5V supply and
offers break-before-make or make-before-break switch
operation using simple logic-level input control.
th
smaller than 4 generation EMR solutions.
• Monolithic IC reliability
• Low matched R
• Eliminates the need for zero cross switching
• Flexible switch timing to transition from ringing mode
to talk mode.
ON
• Clean, bounce-free switching
• Tertiary protection consisting of integrated current
limiting, voltage clamping, and thermal shutdown for
SLIC protection
• 5 V operation with power consumption < 10 mW
• Intelligent battery monitor
The CPC7582xC logic states differ from the
CPC7582xA/B. See “Functional Description” on
page 12 for more information. The CPC7582xC also
has a higher trigger and hold current for the protection
SCR.
• Latched logic-level inputs, no external drive circuitry
required
• SOIC version is pin compatible with Agere product
Ordering Information
CPC7582 part numbers are specified as shown here:
Applications
B - 16-pin SOIC delivered 50/Tube, 1000/Reel
M - 16-pin DFN delivered 52/Tube, 1000/Reel
• Central office (CO)
• Digital Loop Carrier (DLC)
• PBX Systems
• Digitally Added Main Line (DAML)
• Hybrid Fiber Coax (HFC)
• Fiber in the Loop (FITL)
• Pair Gain System
CPC7582 x x xx
TR - Add for Tape & Reel Version
A - With Protection SCR
B - Without Protection SCR
C - With Protection SCR with higher trigger and hold currents
and “Monitor Test State”
• Channel Banks
Figure 1. CPC7582 Block Diagram
+5 Vdc
TTEST
TRING
V
6
4
DD
5
CPC7582
XSW5
XSW3
Tip
3
2 TBAT
TLINE
X
SW1
Secondary
Protection
SLIC
15 RBAT
SW2
X
Ring
RLINE 14
9
VREF
XSW6
Switch
Control
Logic
XSW4
SCR and
Trip Circuit
(CPC7582xB/C)
L
A
T
C
H
INTEST
10
INRINGING
LATCH
11
12
13
RTEST
1
FGND
16
VBAT
8
7
DGND
TSD
300Ω
(min.)
VBAT
RoHS
2002/95/EC
RINGING
Pb
e3
DS-CPC7582-R05
www.clare.com
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