Datasheet > CPC5603CTR

CPC5603CTR

更新时间： 2024-09-16 03:26:27

品牌	Logo	应用领域
CLARE		/
页数	文件大小	规格书
3页	237K
描述
N Channel Depletion Mode FET

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CPC5603CTR 数据手册

CPC5603C

N Channel Depletion Mode FET

Description

Features

• Low on resistance 8 ohms

• Breakdown voltage 415V minimum

• High input impedance

• Low input and output leakage

• Small package size SOT-223

• PC Card (PCMCIA) Compatible

• PCB Space and Cost Savings

The CPC5603C is an “N” channel depletion mode

Field Effect Transistor (FET) that utilizes Clare’s

proprietary third generation vertical DMOS process.

The third generation process realizes world

class, high voltage MOSFET performance in an

economical silicon gate process. The vertical DMOS

process yields a highly reliable device particularly

in difficult application environments such as

telecommunications.

One of the primary applications for the CPC5603C is

as a linear regulator/ hook switch for the LITELINK™

family of Data Access Arrangements (DAA) Devices

CPC5620A, CPC5621A, and CPC5622A.

Applications

• Support Component for LITELINK™

Data Access Arrangement (DAA)

• Telecom

The CPC5603C has a typical on-resistance of 8Ω, a

breakdown voltage exceeding 415V and is available

in an SOT-223 package. As with all MOS devices,

the FET structure prevents thermal runaway and

thermal-induced secondary breakdown.

Ordering Information

Part #

Description

CPC5603C

N-Channel Depletion Mode FET, SOT-223

Package (80/tube)

CPC5603CTR

N-Channel Depletion Mode FET, SOT-223

Package Tape and Reel (1000/reel)

Package Pinout

Pin #

Name

GATE

DRAIN

SOURCE

DRAIN

DS-CPC5603C-R01.0

www.clare.com

12 3

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