Datasheet > CP664V-2N5460

CP664V-2N5460

更新时间： 2024-10-01 14:52:39

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CENTRAL		/
页数	文件大小	规格书
3页	319K
描述
.75V,6V,10mA,310mW Bare die,18.980 X 18.980 mils,JFET

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CP664V-2N5460 数据手册

CP664V-2N5460

P-Channel JFET Die

www.centralsemi.com

The CP664V-2N5460 is a silicon P-Channel JFET designed for low level ampliﬁer applications.

MECHANICAL SPECIFICATIONS:

Die Size

19 x 19 MILS

7.9 MILS

Die Thickness

Drain Bonding Pad Size

Source Bonding Pad Size

Gate Bonding Pad Size

Top Side Metalization

Back Side Metalization

Scribe Alley Width

Wafer Diameter

4.2 MILS DIAMETER

2.9 x 5.3 MILS

Al-Si – 17,000Å

Au – 12,000Å

1.96 MILS

5 INCHES

Gross Die Per Wafer

41,575

MAXIMUM RATINGS: (T =25°C)

Drain-Gate Voltage

SYMBOL

UNITS

Reverse Gate-Source Voltage

Continuous Gate Current

GSR

°C

Operating and Storage Junction Temperature

T , T

-65 to +150

stg

ELECTRICAL CHARACTERISTICS: (T =25°C unless otherwise noted)

SYMBOL

TEST CONDITIONS

MIN

MAX

UNITS

=20V, V =0

5.0

GSS

=15V, V =0, f=1.0kHz

1.0

5.0

DSS

I =10μA

GSS

=15V, I =0.1mA

0.5

4.0

6.0

GS(OFF)

=15V, I =1.0ꢀA

0.75

1.0K

|y |

=15V, V =0, f=1.0kHz

4.0K

ꢀS

|y |

=15V, V =0, f=1.0kHz

ꢀS

=15V, V =0, f=1.0MHz

2.0

rss

iss

=15V, V =0, f=1.0MHz

7.0

=15V, V =0, f=100Hz, BW=1.0Hz

115

nV/ Hz

=15V, V =0, f=100Hz,

R =1.0MΩ, BW=1.0Hz

2.5

R0 (10-August 2020)

12 3

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