Datasheet > CP305-CXT3019-WS

CP305-CXT3019-WS

更新时间： 2024-11-15 10:58:15

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CP305-CXT3019-WS 数据手册

PROCESS CP305

Small Signal Transistor

NPN - High Current Transistor Chip

Central

Semiconductor Corp.

PROCESS DETAILS

Process

EPITAXIAL PLANAR

Die Size

Die Thickness

31 x 31 MILS

9.0 MILS

Base Bonding Pad Area

Emitter Bonding Pad Area

Top Side Metalization

Back Side Metalization

5.9 x 11.8 MILS

6.5 x 13.8 MILS

Al - 30,000Å

Au - 18,000Å

GEOMETRY

GROSS DIE PER 4 INCH WAFER

11,300

PRINCIPAL DEVICE TYPES

2N3019

CMPT3019

CXT3019

CZT3019

BACKSIDE COLLECTOR

145 Adams Avenue

Hauppauge, NY 11788 USA

Tel: (631) 435-1110

Fax: (631) 435-1824

www.centralsemi.com

R2 (1-August 2002)

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