PRELIMINARY
September 1996
COP888GW
8-Bit Microcontroller with Pulse Train Generators
and Capture Modules
General Description
The COP888 family of microcontrollers uses an 8-bit single
Additional Peripheral Features
Y
Idle Timer
Y
chip core architecture fabricated with National Semiconduc-
2
Multi-Input Wake-Up (MIWU) with optional interrupts (8)
MICROWIRE/PLUSTM serial I/O
tor’s M CMOSTM process technology. The COP888GW is a
Y
member of this expandable 8-bit core processor family of
microcontrollers. It is a fully static part, fabricated using dou-
ble-metal silicon gate microCMOS technology.
I/O Features
Y
Memory mapped I/O
Features include an 8-bit memory mapped architecture, MI-
CROWIRE/PLUS serial I/O, two 16-bit timer/counters sup-
porting three modes (Processor Independent PWM genera-
tion, External Event counter and Input Capture mode capa-
bilities), four independent 16-bit pulse train generators with
16-bit prescalers, two independent 16-bit input capture
modules with 8-bit prescalers, multiply and divide functions,
full duplex UART, and two power savings modes (HALT and
IDLE), both with a multi-sourced wake up/interrupt capabili-
ty. This multi-sourced interrupt capability may also be used
independent of the HALT or IDLE modes.
Y
Software selectable I/O options (TRI-STATE Output,
É
Push-Pull Output, Weak Pull-Up Input, High Impedance
Input)
Y
Schmitt trigger inputs on port G
Y
Package: 68-pin PLCC
CPU/Instruction Set Features
Y
1 ms instruction cycle time
Y
Fourteen multi-source vectored interrupts servicing:
Ð External Interrupt with selectable edge
Ð Idle Timer T0
Ð Two Timers (each with 2 interrupts)
Ð MICROWIRE/PLUS
Ð Multi-Input Wake-Up
Ð Software Trap
Ð UART (2)
Ð Capture Timers
Ð Counters (one vector for all four counters)
Ð Default VIS (default interrupt)
Each I/O pin has software selectable configurations. The
devices operate over a voltage range of 2.5V–6V. High
throughput is achieved with an efficient, regular instruction
set operating at a maximum of 1 ms per instruction rate. The
device has low EMI emissions. Low radiated emissions are
achieved by gradual turn-on output drivers and internal I
CC
filters on the chip logic and crystal oscillator. The device is
available in 68-pin PLCC package.
Y
Versatile and easy-to-use instruction set
Key Features
Y
Y
8-bit Stack Pointer SPÐ(stack in RAM)
Two 16-bit input capture modules with 8-bit prescalers
Y
Two 8-bit register indirect data memory pointers
(B and X)
Y
Four Pulse Train Generators with 16-bit prescalers
Y
Full duplex UART
Y
Two 16-bit timers, each with two 16-bit registers
supporting:
Fully Static CMOS
Y
Two power saving modes: HALT and IDLE
k
Ð Processor independent PWM mode
Ð External event counter mode
Ð Input capture mode
Y
Y
Y
Low current drain (typically 1 mA)
Single supply operation: 2.5V–5.5V
b
a
Temperature range: 40 C to 85 C
Y
Quiet design (low radiated emissions)
§
§
Y
16 kbytes on-board ROM
Y
Development Support
Y
512 bytes on-board RAM
Emulation and OTP device
Y
Real time emulation and full program debug offered by
MetaLink’s Development System
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
2
M
CMOSTM, MICROWIRE/PLUSTM, COPSTM, MICROWIRETM and WATCHDOGTM are trademarks of National Semiconductor Corporation.
IBMÉ, PCÉ, PC-ATÉ and PC/XTÉ are registered trademarks of International Business Machines Corporation.
iceMASTERTM is a trademark of MetaLink Corporation.
C
1996 National Semiconductor Corporation
TL/DD12065
RRD-B30M106/Printed in U. S. A.
http://www.national.com