April 1992
COP404C ROMless CMOS Microcontrollers
General Description
Features
Y
Accurate emulation of the COP444C, COP424C and
COP410C
The COP404C ROMless Microcontroller is a member of the
COPSTM family, fabricated using double-poly, silicon gate
CMOS (microCMOS) technology. The COP404C contains
CPU, RAM, I/O and is identical to a COP444C device ex-
cept the ROM has been removed and pins have been add-
ed to output the ROM address and to input the ROM data.
The COP404C can be configured, by means of external
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Lowest Power Dissipation (50 mW typical)
Fully static (can turn off the clock)
Power saving IDLE state and HALT mode
4 ms instruction time, plus software selectable clocks
c
c
8 ROM
128
4 RAM, addresses 2k
pins, to function as
a COP444C, a COP424C, or a
True vectored interrupt, plus restart
Three-level subroutine stack
COP410C. Pins have been added to allow the user to select
the various functional options that are available on the fami-
ly of mask-programmed CMOS parts. The COP404C is pri-
marily intended for use in the development and debug of a
COP program for the COP444C/445C, COP424C/425C,
and COP410C/411C devices prior to masking the final part.
The COP404C is also appropriate in low volume applica-
tions or when the program might be changing.
Single supply operation (2.4V to 5.5V)
Programmable read/write 8-bit timer/event counter
Internal binary counter register with MICROWIRETM
serial I/O capability
Y
Y
Y
Y
General purpose and TRI-STATE outputs
É
LSTTL/CMOS compatible
MICROBUSTM compatible
Software/hardware compatible with other members of
the COP400 family
MICROBUSTM and MICROWIRETM are trademarks of National Semiconductor Corporation.
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
Block Diagram
TL/DD/5530–1
FIGURE 1. Block Diagram
C
1995 National Semiconductor Corporation
TL/DD/5530
RRD-B30M105/Printed in U. S. A.