Datasheet > COM90C66LJP

COM90C66LJP

更新时间： 2024-02-01 18:52:41

品牌	Logo	应用领域
SMSC		控制器
页数	文件大小	规格书
76页	251K
描述
ARCNET Controller/Transceiver with AT Interface and On-Chip RAM

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COM90C66LJP 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	LCC
包装说明：	QCCJ,	针数：	84
Reach Compliance Code：	unknown	风险等级：	5.83
地址总线宽度：	20	总线兼容性：	IBM PC-AT
数据编码/解码方法：	NRZ	外部数据总线宽度：	16
JESD-30 代码：	S-PQCC-J84	JESD-609代码：	e0
长度：	29.2862 mm	湿度敏感等级：	NOT SPECIFIED
串行 I/O 数：	1	端子数量：	84
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装形状：	SQUARE	封装形式：	CHIP CARRIER
峰值回流温度（摄氏度）：	235	认证状态：	COMMERCIAL
座面最大高度：	4.5466 mm	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	TIN LEAD
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	29.2862 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：	1

COM90C66LJP 数据手册

COM90C66

Data Sheet with Erratas for

Rev. B and Rev. D devices

ARCNET^ÒController/Transceiver with

AT^ÒInterface and On-Chip RAM

FEATURES

ARCNET LAN Controller/Transceiver/

Compatible with the SMSC HYC9058/68/ 88

Support Logic/Dual-Port RAM

(COAX and Twisted Pair Drivers)

Token Passing Protocol with Self

Reconfiguration Detection

Variable Data Length Packets

16 Bits CRC Check/Generation

Includes Address Decoding Circuitry for On-

Chip RAM, PROM and I/O

Supports up to 255 Nodes

Contains Software Accessible Node ID

Integrates SMSC COM90C65 with 16-Bit

Data Bus, Dual-Port RAM, and Enhanced

Diagnostics Circuitry

Includes IBM PC/AT Bus Interface

Circuitry

Supports 8- and 16-Bit Data Buses

Full 2K x 8 On-Chip Dual-Port Buffer RAM

Zero Wait State Arbitration for Most AT

Buses

SMSC COM90C26 Software Compatible

Command Chaining Enhances Performance

Supports Memory Mapped and Sequential

I/O Mapped Access to the Internal RAM

Buffer

Compatible with Various Topologies (Star,

Tree, Bus, ...)

On-Board Crystal Oscillator and Reset

Circuitry

Low Power CMOS, Single +5V Supply

GENERAL DESCRIPTION

The SMSC COM90C66 is a special purpose

communications controller for interconnecting

processors and intelligent peripherals using the

ARCNET Local Area Network. The COM90C66

is unique in that it integrates the core ARCNET

logic found in Standard Microsystems' original

COM90C26 and COM90C32 with an on-chip 2K

x 8 RAM, as well as the 16-bit data bus interface

for the IBM PC/AT. Because of the inclusion of

the RAM buffer in the COM90C66, a complete

ARCNET node can be implemented with only

one or two additional ICs (8- or 16-bit

applications, respectively) and a media driver

circuit. The ARCNET core remains functionally

device. Maximum integration has been achieved

by including the 2K x 8 RAM buffer on the chip,

providing the immediate benefits of a lower

device pin count and less board components.

The performance is enhanced in four ways:

16-bit data bus for operation with the IBM PC/AT;

a zero wait state arbitration mechanism, due

partly to the integration of the RAM buffer on-

chip; the ability of the device to do consecutive

transmissions and receptions via the Command

Chaining operation; and improved diagnostics,

allowing the user to control the system more

efficiently. For most AT compatibles, the device

handles zero wait state transfers.

untouched,

eliminating

validation

and

ARCNET is a registered trademark of Datapoint Corporation

IBM, AT, PC/AT and Micro Channel are registered trademarks of

International Business Machines Corporation

compatibility concerns. The enhancements exist

in the integration and the performance of the

12 3 4 5 6 7...76

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