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CM2006-02QR PDF预览

CM2006-02QR

更新时间: 2024-02-15 13:52:31
品牌 Logo 应用领域
CALMIRCO 显示器消费电路商用集成电路光电二极管
页数 文件大小 规格书
6页 137K
描述
VGA Port Companion Circuit For Monitors

CM2006-02QR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:LEAD FREE, QSOP-16针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.63
Is Samacsys:N商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:4.9 mm湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Other Consumer ICs
最大压摆率:2 mA最大供电电压 (Vsup):5 V
最小供电电压 (Vsup):5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9 mmBase Number Matches:1

CM2006-02QR 数据手册

 浏览型号CM2006-02QR的Datasheet PDF文件第2页浏览型号CM2006-02QR的Datasheet PDF文件第3页浏览型号CM2006-02QR的Datasheet PDF文件第4页浏览型号CM2006-02QR的Datasheet PDF文件第5页浏览型号CM2006-02QR的Datasheet PDF文件第6页 
PRELIMINARY  
CM2006  
VGA Port Companion Circuit For Monitors  
Product Description  
Features  
Includes ESD protection, level-shifting, buffering  
and sync impedance matching  
VESA VSIS Version 1 Revision 2 Compatible Inter-  
face  
Supports Optional NAVI Signalling requirements  
7 channels of ESD protection for all VGA port con-  
nector pins meeting IEC-61000-4-2 Level 4 ESD  
requirements ( 8kV contact discharge)  
Very low loading capacitance from ESD protection  
diodes on VIDEO lines, 3pF maximum  
Schmitt triggered input buffers for HSYNC and  
VSYNC lines  
The CM2006 connects between the VGA or DVI-I port  
connector and the internal analog or digital flat panel  
controller logic. The CM2006 incorporates ESD protec-  
tion for all signals, level shifting for the DDC signals  
and buffering for the SYNC signals. ESD protection for  
the video, DDC and SYNC lines is implemented with  
low-capacitance current steering diodes.  
All connector interface pins are designed to safely han-  
dle the high current spikes specified by IEC-61000-4-2  
Level 4 ( 8kV contact discharge). The ESD protection  
for the DDC, SYNC and VIDEO signal pins is designed  
to prevent "back current" when the device is powered  
down while connected to a video source that is pow-  
ered up.  
Bi-directional level shifting N-channel FETs pro-  
vided for DDC_CLK & DDC_DATA channels  
Backdrive protection on all lines  
Compact 16-lead QSOP package  
Separate positive supply rails are provided for the  
VIDEO / SYNC signals and DDC signals to facilitate  
interfacing with low voltage video controller ICs and  
microcontrollers to provide design flexibility in multi-  
supply-voltage environments.  
Applications  
VGA and DVI-I ports in:  
- Monitors  
Two Schmitt-Triggered non-inverting buffers redrive  
and condition the HSYNC and VSYNC signals from the  
video Connector (SYNC1, SYNC2). These buffers  
accept VESA VSIS compliant TTL input signals and  
convert them to CMOS output levels that swing  
- Set Top Boxes  
between Ground and V  
.
CC  
(cont’d next page)  
Simplified Electrical Schematic  
V
1
V
BYP  
8
CC  
CC_DDC  
10  
11  
DDC_OUT1  
DDC_OUT2  
7
3
4
VIDEO_1  
VIDEO_2  
VIDEO_3  
RT  
RT  
5
6
GND  
16  
14  
SYNC_OUT2  
SYNC_OUT1  
GND  
9
DDC_IN1  
12  
2
DDC_IN2  
ENABLE  
SYNC_IN1  
SYNC_IN2  
13  
15  
© 2006 California Micro Devices Corp. All rights reserved.  
02/21/06  
490 N. McCarthy Blvd., Milpitas, CA 95035-5112  
Tel: 408.263.3214  
Fax: 408.263.7846  
www.cmd.com  
1

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