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CLVC1G374QDCKRQ1 PDF预览

CLVC1G374QDCKRQ1

更新时间: 2024-11-09 12:50:43
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
12页 318K
描述
SINFLE D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT

CLVC1G374QDCKRQ1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:TSSOP, TSSOP6,.08针数:6
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.36Samacsys Description:Automotive Catalog Single D-Type Flip-Flop with 3-State Output
控制类型:INDEPENDENT CONTROL计数方向:UNIDIRECTIONAL
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G6
JESD-609代码:e4长度:2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.032 A
湿度敏感等级:1位数:1
功能数量:1端口数量:2
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.01 mA
Prop。Delay @ Nom-Sup:7 ns传播延迟(tpd):18.3 ns
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.1 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:1.25 mm

CLVC1G374QDCKRQ1 数据手册

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SCES607A − SEPTEMBER 2004 − REVISED APRIL 2008  
D
D
D
D
D
D
D
Qualified for Automotive Applications  
Supports 5-V V Operation  
D
D
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
CC  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
Inputs Accept Voltages to 5.5 V  
Max t of 4 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
24-mA Output Drive at 3.3 V  
CC  
I
Supports Partial-Power-Down Mode  
off  
DBV OR DCK PACKAGE  
(TOP VIEW)  
Operation  
description/ordering information  
1
2
3
6
5
4
CLK  
GND  
D
OE  
V
CC  
This single D-type flip-flop is designed for 1.65-V to  
5.5-V V operation.  
Q
CC  
The SN74LVC1G374 features a 3-state output  
designed specifically for driving highly capacitive or  
relatively low-impedance loads. This device is  
particularly suitable for implementing buffer registers,  
input/output (I/O) ports, bidirectional bus drivers, and  
working registers.  
On the positive transition of the clock (CLK) input, the Q output is set to the logic level set up at the data (D)  
input.  
A buffered output-enable (OE) input can be used to place the output in either a normal logic state (high or low  
logic levels) or the high-impedance state. In the high-impedance state, the output neither loads nor drives the  
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines  
without interface or pullup components.  
OE does not affect the internal operations of the flip-flop. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
}
T
A
PACKAGE  
§
SOT (SOT-23) − DBV  
SOT (SC-70) − DCK  
Reel of 3000  
Reel of 3000  
SN74LVC1G374QDBVRQ1  
SN74LVC1G374QDCKRQ1  
CA40  
−40°C to 125°C  
D40  
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see  
the TI web site at http://www.ti.com.  
}Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
§
DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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ꢑꢝ ꢜ ꢨꢣꢢ ꢠ ꢡ ꢢ ꢜꢚ ꢛꢜꢝ ꢞ ꢠꢜ ꢡ ꢥꢤ ꢢ ꢙꢛ ꢙꢢꢟ ꢠꢙꢜꢚ ꢡ ꢥꢤ ꢝ ꢠꢪꢤ ꢠꢤ ꢝ ꢞꢡ ꢜꢛ ꢏꢤꢫ ꢟ ꢡ ꢌꢚꢡ ꢠꢝ ꢣꢞ ꢤꢚꢠ ꢡ  
ꢡ ꢠꢟ ꢚ ꢨꢟ ꢝ ꢨ ꢬ ꢟ ꢝꢝ ꢟ ꢚ ꢠꢭꢩ ꢑꢝ ꢜ ꢨꢣꢢ ꢠꢙꢜꢚ ꢥꢝ ꢜꢢ ꢤꢡ ꢡꢙ ꢚꢮ ꢨꢜꢤ ꢡ ꢚꢜꢠ ꢚꢤ ꢢꢤ ꢡꢡ ꢟꢝ ꢙꢧ ꢭ ꢙꢚꢢ ꢧꢣꢨ ꢤ  
ꢠꢤ ꢡ ꢠ ꢙꢚ ꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠꢤ ꢝꢡ ꢩ  
Copyright 2008, Texas Instruments Incorporated  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CLVC1G374QDCKRQ1 替代型号

型号 品牌 替代类型 描述 数据表
74LVC1G374DCKRG4 TI

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SINGLE D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT
SN74LVC1G374YEPR TI

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SINGLE D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT

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