5秒后页面跳转
CLVC138AQPWRG4Q1 PDF预览

CLVC138AQPWRG4Q1

更新时间: 2024-01-07 09:09:32
品牌 Logo 应用领域
德州仪器 - TI 驱动输入元件光电二极管逻辑集成电路复用器解复用器解码器驱动器
页数 文件大小 规格书
8页 198K
描述
汽车类 3 线至 8 线解码器/多路解复用器 | PW | 16 | -40 to 125

CLVC138AQPWRG4Q1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.28其他特性:TWO ACTIVE-LOW AND ONE ACTIVE-HIGH ENABLE INPUT
系列:LVC/LCX/Z输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.01 mA
Prop。Delay @ Nom-Sup:6.7 ns传播延迟(tpd):7.9 ns
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.75 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm

CLVC138AQPWRG4Q1 数据手册

 浏览型号CLVC138AQPWRG4Q1的Datasheet PDF文件第2页浏览型号CLVC138AQPWRG4Q1的Datasheet PDF文件第3页浏览型号CLVC138AQPWRG4Q1的Datasheet PDF文件第4页浏览型号CLVC138AQPWRG4Q1的Datasheet PDF文件第5页浏览型号CLVC138AQPWRG4Q1的Datasheet PDF文件第6页浏览型号CLVC138AQPWRG4Q1的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢋ ꢌ ꢇ  
ꢈ ꢋꢄ ꢍꢁꢎ ꢏ ꢐ ꢉ ꢋꢄ ꢍꢁꢎ ꢑꢎꢆ ꢐꢑ ꢎꢒꢓ ꢑꢎꢔ ꢕꢄꢏꢍ ꢖ ꢄꢎ ꢗꢎ ꢒ  
SCAS708A − SEPTEMBER 2003 − REVISED MAY 2004  
D
Qualification in Accordance With  
AEC-Q100  
D
Typical V  
(Output V  
= 3.3 V, T = 25°C  
Undershoot)  
OHV  
OH  
>2 V at V  
CC A  
D
Qualified for Automotive Applications  
D OR PW PACKAGE  
(TOP VIEW)  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
1
2
3
4
5
6
7
8
16  
15  
14  
V
Y0  
Y1  
A
B
C
CC  
D
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
13 Y2  
12  
G2A  
G2B  
G1  
Y7  
GND  
Y3  
D
D
D
D
Operates From 2 V to 3.6 V  
11 Y4  
10 Y5  
Inputs Accept Voltages to 5.5 V  
Max t of 5.8 ns at 3.3 V  
pd  
9
Y6  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
Contact factory for details. Q100 qualification data available on  
request.  
description/ordering information  
The SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V V  
operation.  
CC  
The device is designed for high-performance memory-decoding or data-routing applications requiring very  
short propagation delay times. In high-performance memory systems, this decoder minimizes the effects of  
system decoding. When employed with high-speed memories utilizing a fast enable circuit, delay times of this  
decoder and the enable time of the memory usually are less than the typical access time of the memory. This  
means that the effective system delay introduced by the decoder is negligible.  
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two  
active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when  
expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires  
only one inverter. An enable input can be used as a data input for demultiplexing applications.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator  
in a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − D  
Reel of 2500  
Reel of 2000  
SN74LVC138AQDRQ1  
SN74LVC138AQPWRQ1  
L138AQ1  
L138AQ1  
−40°C to 125°C  
TSSOP − PW  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available  
at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢏꢣ  
Copyright 2004, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与CLVC138AQPWRG4Q1相关器件

型号 品牌 描述 获取价格 数据表
CLVC139AQPWRG4Q1 TI DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER

获取价格

CLVC157AQPWRG4Q1 TI 汽车类四路 2 线至 1 线数据选择器/多路复用器 | PW | 16 | -40 to

获取价格

CLVC16244AIDGGREP TI 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

获取价格

CLVC16244AIDGGRQ1 TI 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

获取价格

CLVC16373AMDLREP TI 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

获取价格

CLVC16T245MDGGEP TI 增强型产品 16 位双电源总线收发器 | DGG | 48 | -55 to 125

获取价格