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CLPAVK-800.000EL PDF预览

CLPAVK-800.000EL

更新时间： 2024-11-28 17:35:31
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纬创 - RALTRON /
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CLPAVK-800.000EL 数据手册

 浏览型号CLPAVK-800.000EL的Datasheet PDF文件第2页浏览型号CLPAVK-800.000EL的Datasheet PDF文件第3页 
CLOCK  
Page 1 of 3  
CLP: PLL LVDS SERIES: ULTRA HF CLOCK OSCILLATOR, LVDS, +3.3 VDC  
DESCRIPTION: A crystal controlled, high frequency, highly stable oscillator, adhering to Low Voltage Differential Signaling  
(LVDS) Standards. The output can be Tri-stated to facilitate testing or combined multiple clocks. The device is contained in a  
sub-miniature, very low profile, leadless ceramic SMD package with 6 gold contact pads. This miniature oscillator is ideal for  
today's automated assembly environments.  
APPLICATIONS AND FEATURES:  
ꢁ
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Infiniband; Fiber Channel; SATA; 10GbE; Network Processors; SOHO Routing; Switches;  
Common Frequencies: 150 MHz; 156.25 MHz; 155.52 MHz; 161.1328 MHz; 212.5MHz; 312.5MHz  
+3.3 VDC LVDS  
Frequency Range from 750KHz to 800 MHz  
PLL multiplication (F>25MHz)  
Miniature Ceramic SMD Package Available on Tape and Reel  
Lead Free and ROHS Compliant  
ꢂ
ABSOLUTE MAXIMUM RATINGS:  
PARAMETER  
SYMBOL  
VALUE  
UNIT  
Operating temperature range Ta  
-40…+85  
-55…+90  
°C  
Storage temperature range  
Supply voltage  
T(stg)  
°C  
Vcc  
Vi  
+4.6  
VDC  
VDC  
VDC  
Maximum Input Voltage  
Maximum Output Voltage  
Vss-0.5…Vcc+0.5  
Vss-0.5…Vcc+0.5  
Vo  
ꢂ
ELECTRICAL PARAMETERS:  
PARAMETER  
SYMBOL  
TEST CONDITIONS*1  
VALUE  
0.75~ 800.00**  
UNIT  
Nominal Frequency  
Supply Voltage  
Supply Current  
Output Logic Type  
Load  
fo  
MHz  
VDC  
mA  
Vcc  
Is  
+3.3 ±5%  
80.0 MAX  
LVDS  
Connected between Out and Complementary Out  
100  
Ω
Voh  
Vol  
Vod  
Output logic high  
Output logic low  
Differential output  
Differential output error  
Offset Voltage  
1.43 Typ, 1.6 Max  
0.9 Min, 1.10 Typ  
247 Min, 330 Typ, 454 Max  
50 Max  
1.125 Min, 1.25 Typ, 1.375 Max  
25 Max  
VDC  
VDC  
mV  
mV  
VDC  
mVDC  
Output Voltage Levels  
VOS  
OS  
Offset error  
Duty Cycle  
DC  
Measured at 50% of Vcc  
40/60 to 60/40 or 45/55 to 55/45  
0.7 TYP 1.0 MAX*2  
%
Rise / Fall Time  
tr / tf  
Measured at 20/80% and 80/20% Vcc Levels  
ns  
Integrated Phase tji RMS,  
Fj = 12 kHz…20 MHz5  
Fo=155.52MHz  
Fo=622.08MHz  
Fo=155.52MHz. 4 TYP **  
Fo=622.08MHz 6 TYP **  
Fo=155.52MHz. 30 TYP**  
2.6 TYP**  
2.5 TYP**  
ps  
ps  
ps  
Random period Jitter Rj using  
wavecrest analyzer 4  
Jitter  
J
Acumm. Peak to Peak Jitter Tp-p  
using wavecrest analyzer*4  
Fo=622.08MHz  
∆f=10 Hz  
40 TYP**  
-60  
∆f=100 Hz  
∆f=1 KHz  
∆f=10 KHz  
∆f=100 KHz  
∆f=1M Hz  
-90  
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
-120  
-125  
-121  
-121  
-140  
-145  
Phase Noise  
typ. @155.52MHz6  
£(∆f)  
∆f/fc  
∆f=10M Hz  
∆f>20M Hz  
±20, ±25, ±50, or ±100 MAX*3  
Overall Frequency Stability  
Op. Temp., Aging, Load, Supply and Cal. Variations  
ppm  
Enable High Option;  
VDC  
VDC  
Pin 1  
Output Enabled  
Output Disabled  
En  
Dis  
High Voltage or No Connect  
Ground  
0.7•Vcc MIN  
0.3•Vcc MAX  
Enable Low Option;  
VDC  
VDC  
Pin 1  
Output Disabled  
Output Enabled  
Dis  
En  
High Voltage  
Ground or No Connect  
0.7•Vcc MIN  
0.3•Vcc MAX  
RALTRON ELECTRONICS CORP. ꢀ10651 N.W . 19t h St ꢀMiami, Florida 33172 ꢀU.S.A.  
phone: (305) 593-6033 ꢀfax: (305) 594-3973 ꢀe-mail: sales@raltron.com ꢀWEB: http://www.raltron.com  
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