June 1999
N
CLC431/432
Dual Wideband Monolithic Op Amp with Disable
Features
■ Widebandwidth: 92MHz(AV=+1)
General Description
TheCLC431andCLC432current-feedbackamplifiersprovidewide
bandwidthsandhighslewratesforapplicationswhereboarddensity
and power are key considerations. These amplifiers provide DC-
coupledsmallsignalbandwidthsexceeding92MHzwhileconsuming
only 7mA per channel. Operating from ±15V supplies, the CLC431/
432’s enhanced slew rate circuitry delivers large-signal bandwidths
62MHz (A =+2)
v
■ Fast slew rate: 2000V/µs
■ Fast disable: 1µs to high-Z output
■ High channel isolation: 70dB at 10MHz
■ Single or dual supplies: ±5V to ±16.5V
with output voltage swings up to 28V . A wide range of bandwidth-
insensitive gains are made possible by virtue of the CLC431 and
CLC432’scurrent-feedbacktopology.
pp
Applications
■ Video signal multiplexing
■ Twisted-pairdifferentialdriver
■ CCD buffer & level shifting
■ Discretegain-selectamplifier
■ Transimpedanceamplifier
The large common-mode input range and fast settling time (70ns
to 0.05%) make these amplifiers well suited for CCD & data
telecommunication applications. The disable of the CLC431 can
accommodate ECL or TTL logic levels or a wide range of user
definable inputs. With its fast enable/disable time (0.2µs/1µs) and
high channel isolation of 70dB at 10MHz, the CLC431 can easily be
configuredasa2:1MUX.Manyhighperformancevideoapplications
requiring signal gain and/or switching will be satisfied with the
CLC431/432 due to their very low differential gain and phase errors
(less than 0.1% and 0.1°; A = +2V/V at 4.43MHz into 150Ω load).
v
Quick8nsriseandfalltimeson10VpulsesallowtheCLC431/432to
drive either twisted pair or coaxial transmission lines over long
distances.
The CLC431/432's combination of low input voltage noise, wide
common-mode input voltage range and large output voltage swings
make them especially well suited for wide dynamic range signal
processingapplications.
TypicalApplication
Discrete Gain Select Amplifier
Pinout
PDIP & SOIC
Rg
500Ω
Channel 1 (Gain = 2)
Rf
CLC431
500Ω
V
1
V
1
1
14 out
inv
1
2
3
4
5
6
7
Ri
50Ω
50Ω
½CLC431
½CLC431
V
R
TTL1
50Ω
V
V
13
12
11
10
9
non-inv
Rs
Vout
SELECT
DIS1
+V
DIS1
50Ω
CLC432
Ri
RL
50Ω
cc
-V
cc
Vout
1
1
1
1
2
3
4
8
7
6
5
+Vcc
Vout
1Vpp @ 5MHz
50Ω
DIS2
DIS2
500Ω
Vinv
2
-
+
Rf
V
V
TTL2
2
R
2
2
non-inv
Channel 2 (Gain = 5)
Vnon-inv
Vinv2
Rg
-
125Ω
+
V
inv
out
8
-Vcc
Vnon-inv2
1999 National Semiconductor Corporation
PrintedintheU.S.A.
http://www.national.com