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CLC420AJ-QML PDF预览

CLC420AJ-QML

更新时间: 2024-11-21 13:06:51
品牌 Logo 应用领域
美国国家半导体 - NSC 运算放大器
页数 文件大小 规格书
10页 290K
描述
IC OP-AMP, 2000 uV OFFSET-MAX, 300 MHz BAND WIDTH, CDIP8, CERDIP-8, Operational Amplifier

CLC420AJ-QML 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:CERDIP-8
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.42Is Samacsys:N
放大器类型:OPERATIONAL AMPLIFIER架构:VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB):10 µA25C 时的最大偏置电流 (IIB):10 µA
标称共模抑制比:70 dB频率补偿:YES
最大输入失调电压:2000 µVJESD-30 代码:R-GDIP-T8
JESD-609代码:e0低-偏置:NO
低-失调:NO微功率:NO
负供电电压上限:-7 V标称负供电电压 (Vsup):-5 V
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:RAIL
峰值回流温度(摄氏度):NOT SPECIFIED功率:NO
电源:+-5 V可编程功率:NO
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:5.08 mm最小摆率:430 V/us
标称压摆率:1100 V/us子类别:Operational Amplifier
最大压摆率:5 mA供电电压上限:7 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED标称均一增益带宽:300000 kHz
最小电压增益:400宽带:YES
宽度:7.62 mmBase Number Matches:1

CLC420AJ-QML 数据手册

 浏览型号CLC420AJ-QML的Datasheet PDF文件第2页浏览型号CLC420AJ-QML的Datasheet PDF文件第3页浏览型号CLC420AJ-QML的Datasheet PDF文件第4页浏览型号CLC420AJ-QML的Datasheet PDF文件第5页浏览型号CLC420AJ-QML的Datasheet PDF文件第6页浏览型号CLC420AJ-QML的Datasheet PDF文件第7页 
September 1999  
CLC420  
High-Speed, Voltage Feedback Op Amp  
General Description  
Applications  
n Active filters/integrators  
n Differential amplifiers  
n Pin diode receivers  
n Log amplifiers  
The CLC420 is an operational amplifier designed for applica-  
tions requiring matched inputs, integration or transimped-  
ance amplification. Utilizing voltage feedback architecture,  
the CLC420 offers a 300MHz bandwidth, a 1100V/µs slew  
rate and  
a 4mA supply current (power consumption of  
n D/A converters  
n Photo multiplier amplifiers  
±
40mW, 5V supplies).  
Applications such as differential amplifiers will benefit from  
70dB common mode rejection ratio and an input offset cur-  
rent of 0.2µA. With its unity-gain stability, 2pA/  
Non-Inverting Frequency Response  
current  
noise and 3µA of input bias current, the CLC420 is designed  
to meet the needs of filter applications and log amplifiers.  
The low input offset current and current noise, combined  
with a settling time of 18ns to 0.01% make the CLC420 ideal  
for D/A converters, pin diode receivers and photo multipliers  
amplifiers. All applications will find 70dB power supply rejec-  
tion ratio attractive.  
Features  
n 300MHz small signal bandwidth  
n 1100V/µs slew rate  
n Unity-gain stability  
n Low distortion, -60dBc at 20MHz  
n 0.01% settling in 18ns  
n 0.2µA input offset current  
DS012752-19  
n 2pA  
current noise  
Connection Diagram  
DS012752-18  
Pinout  
DIP & SOIC  
DS012752-20  
2nd and 3rd Harmonic Distortion  
© 1999 National Semiconductor Corporation  
DS012752  
www.national.com  

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