Datasheet > 信号电路 > 锁相环或频率合成电路> CS2000-OTP

CS2000-OTP

更新时间： 2024-01-29 19:02:03

品牌	Logo	应用领域
凌云 - CIRRUS		时钟
页数	文件大小	规格书
30页	251K
描述
Fractional-N Clock Synthesizer & Clock Multiplier

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技术参数
数据手册

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CS2000-OTP 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	TSSOP, TSSOP10,.19,20	Reach Compliance Code：	compliant
风险等级：	5.7	模拟集成电路 - 其他类型：	PHASE LOCKED LOOP
JESD-30 代码：	S-PDSO-G10	长度：	3 mm
功能数量：	1	端子数量：	10
最高工作温度：	105 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP10,.19,20	封装形状：	SQUARE
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	NOT SPECIFIED
座面最大高度：	1.1 mm	最大供电电流 (Isup)：	18 mA
最大供电电压 (Vsup)：	3.5 V	最小供电电压 (Vsup)：	3.1 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	HYBRID	温度等级：	AUTOMOTIVE
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3 mm	Base Number Matches：	1

CS2000-OTP 数据手册

CS2000-OTP

Fractional-N Clock Synthesizer & Clock Multiplier

Features

General Description

 Delta-Sigma Fractional-N Frequency Synthesis

The CS2000-OTP is an extremely versatile system

clocking device that utilizes a programmable phase lock

loop. The CS2000-OTP is based on a hybrid analog-

digital PLL architecture comprised of a unique combina-

–

Generates a Low Jitter 6 - 75 MHz Clock

from an 8 - 75 MHz Reference Clock

 Clock Multiplier / Jitter Reduction

tion of

Delta-Sigma Fractional-N Frequency

–

Generates a Low Jitter 6 - 75 MHz Clock

from a Jittery 50 Hz to 30 MHz Clock

Source

Synthesizer and a Digital PLL. This architecture allows

for both frequency synthesis/clock generation from a

stable reference clock as well as generation of a low-jit-

ter clock relative to an external noisy synchronization

clock with frequencies as low as 50 Hz. The CS2000-

OTP has many configuration options which are set once

prior to runtime. At runtime there are three hardware

configuration pins available for mode and feature

selection.

 Highly Accurate PLL Multiplication Factor

–

Maximum Error Less Than 1 PPM in High-

Resolution Mode

 One-Time Programmability

–

Configurable Hardware Control Pins

Configurable Auxiliary Output

The CS2000-OTP is available in a 10-pin MSOP pack-

age in Commercial (-10°C to +70°C) grade. Customer

development kits are also available for custom device

prototyping, small production programming, and device

evaluation. Please see “Ordering Information” on

page 29 for complete details.

 Flexible Sourcing of Reference Clock

–

External Oscillator or Clock Source

Supports Inexpensive Local Crystal

 Minimal Board Space Required

–

No External Analog Loop-filter

Components

3.3 V

Timing Reference

Frequency Reference

Hardware Control

Hardware Configuration

Auxiliary

Output

PLL Output

Lock Indicator

Fractional-N

Frequency Synthesizer

8 MHz to 75 MHz

Low-Jitter Timing Reference

6 to 75 MHz

PLL Output

Output to Input

Clock Ratio

50 Hz to 30 MHz

Frequency Reference

Digital PLL & Fractional

N Logic

Output to Input

Clock Ratio

AUG '09

DS758F1

http://www.cirrus.com

12 3 4 5 6 7...30

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与CS2000-OTP相关器件

型号	品牌	描述	获取价格	数据表
CS2000-OTP_09	CIRRUS	Fractional-N Clock Synthesizer & Clock Multiplier	获取价格
CS2000P-CZZ	CIRRUS	Fractional-N Clock Synthesizer & Clock Multiplier	获取价格
CS2000P-CZZR	CIRRUS	Fractional-N Clock Synthesizer & Clock Multiplier	获取价格
CS2000P-DZZ	CIRRUS	Phase Locked Loop, Hybrid, PDSO10, 3 MM, LEAD FREE, MO-187, MSOP-10	获取价格
CS2000P-DZZR	CIRRUS	Phase Locked Loop, Hybrid, PDSO10, 3 MM, LEAD FREE, MO-187, MSOP-10	获取价格
CS2001	ONSEMI	1.2 A Switching Regulator, and 5.0 V, 100 mA Linear Regulator with RESET	获取价格

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