Datasheet > CHM50N06NPT

CHM50N06NPT

更新时间： 2024-09-25 06:47:43

品牌	Logo	应用领域
力勤 - CHENMKO		晶体晶体管
页数	文件大小	规格书
2页	219K
描述
N-Channel Enhancement Mode Field Effect Transistor

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中文翻译

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数据手册

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CHM50N06NPT 数据手册

CHENMKO ENTERPRISE CO.,LTD

CHM50N06NPT

SURFACE MOUNT

N-Channel Enhancement Mode Field Effect Transistor

VOLTAGE 60 Volts CURRENT 50 Ampere

APPLICATION

* Servo motor control.

* Power MOSFET gate drivers.

* Other switching applications.

D2PAK

FEATURE

* Small package. (D2PAK)

0.420(10.67)

0.380(9.69)

0.190(4.83)

* Super high dense cell design for extremely low RDS(ON).

0.160(4.06)

0.055(1.40)

* High power and current handing capability.

0.245(6.22)

0.045(1.14)

MIN.

0.055(1.40)

0.047(1.19)

CONSTRUCTION

* N-Channel Enhancement

0.110(2.79)

0.025(0.64)

0.018(0.46)

0.110(2.79)

0.080(2.03)

0.090(2.29)

0.100(2.54)

0.095(2.41)

0.037(0.940)

0.027(0.686)

(3)

1 Gate

CIRCUIT

2 Source

3 Drain ( Heat Sink )

(1)

Dimensions in inches and (millimeters)

D2PAK

(2)

Absolute Maximum Ratings T_A= 25°C unless otherwise noted

Symbol

Parameter

CHM50N06NPT

Units

V_DSS

Drain-Source Voltage

Gate-Source Voltage

V_GSS

±20

Maximum Drain Current - Continuous

- Pulsed

150

131

I_D

(Note 3)

P_D

T_J

°C

Maximum Power Dissipation at Tc = 25°C

Operating Temperature Range

-55 to 150

Storage Temperature Range

STG

Note : 1. Surface Mounted on FR4 Board , t <=10sec

2. Pulse Test , Pulse width <= 300us , Duty Cycle <= 2%

3. Repetitive Rating , Pulse width linited by maximum junction temperature

4. Guaranteed by design , not subject to production trsting

Thermal characteristics

(Note 1)

θJA

Thermal Resistance, Junction-to-Ambient

62.5

°C/W

2008-01

中文翻译

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