Datasheet > CHL8550

CHL8550

更新时间： 2024-09-24 12:55:11

品牌	Logo	应用领域
英飞凌 - INFINEON		驱动器栅
页数	文件大小	规格书
15页	365K
描述
High.Efficiency Variable Gate MOSFET Driver

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CHL8550 数据手册

High‐Efficiency Variable Gate MOSFET Driver

CHL8550

FEATURES

DESCRIPTION



Ideal for Server Memory applications using +5V

The CHL8550 MOSFET driver is a high‐efficiency gate driver

which can switch both high‐side and low‐side N‐channel

external MOSFETs in a synchronous buck converter. It is

intended for use with IR Digital PWM controllers to provide

a total voltage regulator (VR) solution for today’s advanced

computing applications.



Separate HVCC and LVCC capable of drive voltages

from 4.0 to 13.2V for optimal system efficiency



Adjustable thermal warning flag for phase‐by‐

phase thermal protection

Large drivers designed to drive 3nF in < 10ns with

any voltage from 5V to 12V (typ) supplied to the

HVCC and LVCC pins

The CHL8550 driver is capable of rapidly switching large

MOSFETs with low R_dsonand large input capacitance used

in high‐efficiency designs. It is uniquely designed to

operate from a 5V source, minimizing load current.

It also has separate HVCC and LVCC drive inputs, capable

of 4.0V to 13.2V operation. Used in conjunction with IR’s

Variable Gate Drive controller feature, or a 5V standby

source in sleep mode, maximum power stage efficiency

can be attained.



Low‐side driver – 2A source/4A sink

High‐side driver – 2A source/2A sink

Transitions times & Propagation delays < 10ns



Integrated bootstrap diode

Capable of high switching frequencies from 200kHz

up to greater than 1MHz



Compatible with IR’s patented Active Tri‐Level

(ATL) PWM for fastest response to transient

overshoot

The CHL8550 has a unique circuit which maintains drive

strength to the external MOSFETs regardless of the drive

voltage, insuring fast switching even at 5V as the drive

voltage. The integrated boot diode reduces external

component count. The CHL8550 also features an adaptive

non‐overlap control for shoot‐through protection.



Non‐overlap and under voltage protection

Thermally enhanced 10‐pin DFN package

Lead free RoHS compliant package

Low Quiescent power to optimize efficiency

The CHL8550 is configured to drive both the high‐ and

low‐side switches from the patented IR fast Active Tri‐Level

(ATL) PWM signal, which will optimize the turn off time of

individual phases, optimizing transient performance.

APPLICATIONS



Multiphase synchronous buck converter for Server

CPUs and DDR Memory VR solutions



High efficiency and compact VRM

Optimized for Sleep state S3 systems using +5VSB

Notebook Computer and Graphics VR solutions

BASIC APPLICATION

PIN DIAGRAM

Figure 1: CHL8550 Basic Application Circuit

Figure 2: CHL8550 Package Top View

December 6, 2011 | FINAL | V1.05

12 3 4 5 6 7...15

中文翻译

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