Datasheet > CDP1878CD

CDP1878CD

更新时间： 2024-11-17 22:48:47

品牌	Logo	应用领域
英特矽尔 - INTERSIL		外围集成电路光电二极管双倍数据速率
页数	文件大小	规格书
13页	64K
描述
CMOS Dual Counter-Timer

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CDP1878CD 数据手册

CDP1878C

CMOS Dual Counter-Timer

March 1997

Features

Description

• Compatible with General Purpose and CDP1800

Series Microprocessor Systems

The CDP1878C is a dual counter-timer consisting of two 16-

bit programmable down counters that are independently

controlled by separate control registers. The value in the reg-

isters determine the mode of operation and control func-

tions. Counters and registers are directly addressable in

memory space by any general industry type microproces-

sors, in addition to input/output mapping with the CDP1800

series microprocessors.

• Two 16-Bit Down Counters and Two 8-Bit Control

Registers

• 5 Modes Including a Versatile Variable-Duty Cycle

Mode

• Programmable Gate-Level Select

Each counter-timer can be conﬁgured in ﬁve modes with the

additional ﬂexibility of gate-level control. The control regis-

ters in addition to mode formatting, allow software start and

stop, interrupt enable, and an optional read control that

allows a stable readout from the counters. Each counter-

timer has software control of a common interrupt output with

an interrupt status register indicating which counter-timer

has timed out.

• Two-Complemented Output Pins for Each Counter-

Timer

• Software-Controlled Interrupt Output

• Addressable in Memory Space or CDP1800-Series I/O

Space

Ordering Information

In addition to the interrupt output, true and complemented

outputs are provided for each counter-timer for control of

peripheral devices.

PART

NUMBER

CDP1878CE

CDP1878CD

TEMP. RANGE

PACKAGE

PKG. NO.

E28.6

N28.6

This type is supplied in 28-lead dual-in-line ceramic pack-

ages (D sufﬁx), and 28-lead dual-in-line plastic packages (E

sufﬁx).

-40 C to +85 C PDIP

-40 C to +85 C SBDIP

Pinout

CDP1878C

(DIP)

TOP VIEW

TABLE 1. MODE DESCRIPTION

MODE

FUNCTION

APPLICATION

INT

TAO

TAG

TACL

1 Timeout

Outputs change when clock

decrements counter to “0”

Event counter

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

TBO

TBG

TBCL

2 Timeout

Strobe

One clockwide output pulse

when clock decrements

counter to “0”

Trigger pulse

IO/MEM

TPB/WR

TPA

3 Gate-Con-

trolled One

Shot

Outputs change when clock

decrements counter to “0”.

Retriggerable

Time-delay

generation

4 Rate Generator Repetitive clockwide output

pulse

Time-base

generator

5 Variable-Duty Repetitive output with

Cycle

Motor control

programmed duty cycle

RESET

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 1341.2

4-91

12 3 4 5 6 7...13

中文翻译

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与CDP1878CD相关器件

型号	品牌	获取价格	描述	数据表
CDP1878CDX	RENESAS	获取价格	IC,TIMER,CMOS,DIP,28PIN,CERAMIC
CDP1878CE	INTERSIL	获取价格	CMOS Dual Counter-Timer
CDP1878CEX	RENESAS	获取价格	CDP1878CEX
CDP1878D	RENESAS	获取价格	IC,TIMER,CMOS,DIP,28PIN,CERAMIC
CDP1878DX	RENESAS	获取价格	CDP1878DX
CDP1878E	RENESAS	获取价格	IC,TIMER,CMOS,DIP,28PIN,PLASTIC
CDP1878EX	RENESAS	获取价格	CDP1878EX
CDP1879	INTERSIL	获取价格	CMOS Real-Time Clock
CDP1879C-1	INTERSIL	获取价格	CMOS Real-Time Clock
CDP1879C1D	ETC	获取价格	Peripheral IC

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