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CDCVF25081PW PDF预览

CDCVF25081PW

更新时间： 2024-01-07 15:52:45
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动器
页数 文件大小 规格书
16页 596K
描述
3.3-V PHASED-LOCK LOOP CLOCK DRIVER

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中文翻译

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CDCVF25081PW 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP16,.25针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：0.94系列：25081
输入调节：STANDARDJESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：5 mm
负载电容（CL）：25 pF逻辑集成电路类型：PLL BASED CLOCK DRIVER
最大I（ol）：0.012 A湿度敏感等级：1
功能数量：1反相输出次数：
端子数量：16实输出次数：8
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TUBE峰值回流温度（摄氏度）：260
电源：3.3 VProp。Delay @ Nom-Sup：6 ns
传播延迟（tpd）：6 ns认证状态：Not Qualified
Same Edge Skew-Max（tskwd）：0.15 ns座面最大高度：1.2 mm
子类别：Clock Driver最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm
最小 fmax：200 MHzBase Number Matches：1

CDCVF25081PW 数据手册

 浏览型号CDCVF25081PW的Datasheet PDF文件第2页浏览型号CDCVF25081PW的Datasheet PDF文件第3页浏览型号CDCVF25081PW的Datasheet PDF文件第4页浏览型号CDCVF25081PW的Datasheet PDF文件第5页浏览型号CDCVF25081PW的Datasheet PDF文件第6页浏览型号CDCVF25081PW的Datasheet PDF文件第7页 
CDCVF25081  
3.3-V PHASED-LOCK LOOP CLOCK DRIVER  
SCAS671A – OCTOBER 2001 – REVISED FEBRUARY 2003  
D PACKAGE (SOIC)  
PW PACKAGE (TSSOP)  
(TOP VIEW)  
D
Phase-Locked Loop-Based Zero-Delay  
Buffer  
D
Operating Frequency: 8 MHz to 200 MHz  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CLKIN  
1Y0  
FBIN  
1Y3  
1Y2  
D
Low Jitter (Cycle-Cycle): ±100 ps Over the  
Range 66 MHz to 200 MHz  
1Y1  
D
D
D
Distributes One Clock Input to Two Banks  
of Four Outputs  
V
V
DD  
DD  
GND  
2Y0  
2Y1  
S2  
GND  
2Y3  
2Y2  
S1  
Auto Frequency Detection to Disable  
Device (Power Down Mode)  
Consumes Less Than 20 µA in Power Down  
Mode  
D
Operates From Single 3.3-V Supply  
D
Industrial Temperature Range –40°C to  
85°C  
D
D
D
D
25-Ω On-Chip Series Damping Resistors  
No External RC Network Required  
Spread Spectrum Clock Compatible (SSC)  
Available in 16-Pin TSSOP or 16-Pin SOIC  
Packages  
description  
The CDCVF25081 is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a PLL to  
precisely align, in both frequency and phase, the output clocks to the input clock signal. The CDCVF25081  
operates from a nominal supply voltage of 3.3 V. The device also includes integrated series-damping resistors  
in the output drivers that make it ideal for driving point-to-point loads.  
Two banks of four outputs each provide low-skew, low-jitter copies of CLKIN. All outputs operate at the same  
frequency. Output duty cycles are adjusted to 50%, independent of duty cycle at CLKIN. The device  
automatically goes into power-down mode when no input signal is applied to CLKIN and the outputs go into a  
low state. Unlike many products containing PLLs, the CDCVF25081 does not require an external RC network.  
The loop filter for the PLL is included on-chip, minimizing component count, space, and cost.  
Because it is based on a PLL circuitry, the CDCVF25081 requires a stabilization time to achieve phase lock of  
the feedback signal to the reference signal. This stabilization is required following power up and application of  
a fixed-frequency signal at CLKIN and any following changes to the PLL reference.  
The CDCVF25081 is characterized for operation from -40°C to 85°C.  
FUNCTION TABLE  
S2  
0
S1  
0
1Y0–1Y3  
Hi-Z  
2Y0–2Y3  
Hi-Z  
OUTPUT SOURCE  
PLL SHUTDOWN  
N/A.  
Yes  
No  
†
0
1
Active  
Active  
Active  
Hi-Z  
PLL  
Input clock (PLL bypass)  
1
0
Active  
Active  
Yes  
No  
†
PLL  
1
1
†
CLK input frequency < 2 MHz switches the outputs to low level  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001 – 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...16

中文翻译

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CDCVF25081PW 替代型号

型号 品牌 替代类型 描述 数据表
CDCVF25081PWR TI

完全替代

 3.3-V PHASED-LOCK LOOP CLOCK DRIVER
CDCVF25081PWG4 TI

完全替代

 3.3-V PHASED-LOCK LOOP CLOCK DRIVER
CDCVF25081DR TI

完全替代

 3.3-V PHASED-LOCK LOOP CLOCK DRIVER

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 		3.3-V 1:8 ZERO DELAY (PLL) x4 CLOCK MULTIPLIER
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 		3.3-V PHASE-LOCK LOOP CLOCK DRIVER
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