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CDCU877BZQLR PDF预览

CDCU877BZQLR

更新时间： 2024-11-06 19:44:03
品牌 Logo 应用领域
德州仪器 - TI 驱动动态存储器双倍数据速率逻辑集成电路
页数 文件大小 规格书
17页 507K
描述
1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 52-BGA MICROSTAR JUNIOR -40 to 85

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CDCU877BZQLR 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA, BGA52,6X10,25针数：52
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.81系列：877
输入调节：DIFFERENTIALJESD-30 代码：R-PBGA-B52
长度：7 mm逻辑集成电路类型：PLL BASED CLOCK DRIVER
最大I（ol）：0.009 A功能数量：1
反相输出次数：端子数量：52
实输出次数：10最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA52,6X10,25封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：1.8 V认证状态：Not Qualified
Same Edge Skew-Max（tskwd）：0.025 ns座面最大高度：1 mm
子类别：Clock Drivers最大供电电压 (Vsup)：1.9 V
最小供电电压 (Vsup)：1.7 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.65 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.5 mm
最小 fmax：340 MHzBase Number Matches：1

CDCU877BZQLR 数据手册

 浏览型号CDCU877BZQLR的Datasheet PDF文件第2页浏览型号CDCU877BZQLR的Datasheet PDF文件第3页浏览型号CDCU877BZQLR的Datasheet PDF文件第4页浏览型号CDCU877BZQLR的Datasheet PDF文件第5页浏览型号CDCU877BZQLR的Datasheet PDF文件第6页浏览型号CDCU877BZQLR的Datasheet PDF文件第7页 
CDCU877B  
1.8-V PHASE LOCK LOOP CLOCK DRIVER  
www.ti.com  
SCAS801B–JUNE 2005–REVISED JULY 2007  
FEATURES  
•
•
•
Low Dynamic Phase Offset: ±15 ps  
Low Static Phase Offset: ±50 ps  
•
1.8-V Phase Lock Loop Clock Driver for  
Double Data Rate (DDR II) Applications  
Distributes One Differential Clock Input to Ten  
Differential Outputs  
•
•
•
•
•
•
Spread Spectrum Clock Compatible  
Operating Frequency: 10 MHz to 340 MHz  
Low Current Consumption: <115 mA  
Low Jitter (Cycle-Cycle): ±30 ps  
Low Output Skew: 25 ps  
•
•
52-Ball μBGA (MicroStar™ Junior BGA,  
0,65-mm pitch)  
External Feedback Pins (FBIN, FBIN) are Used  
to Synchronize the Outputs to the Input  
Clocks  
Low Period Jitter: ±20 ps  
•
Fail-Safe Inputs  
DESCRIPTION  
The CDCU877B is a high-performance, low-jitter, low-skew, zero-delay buffer that distributes a differential clock  
input pair (CK, CK) to ten differential pairs of clock outputs (Yn, Yn) and to one differential pair of feedback clock  
outputs (FBOUT, FBOUT). The clock outputs are controlled by the input clocks (CK, CK), the feedback clocks  
(FBIN, FBIN), the LVCMOS control pins (OE, OS), and the analog power input (AVDD). When OE is low, the  
clock outputs, except FBOUT/FBOUT, are disabled while the internal PLL continues to maintain its locked-in  
frequency. OS (output select) is a program pin that must be tied to GND or VDD. When OS is high, OE functions  
as previously described. When OS and OE are both low, OE has no affect on Y7/Y7, they are free running.  
When AVDD is grounded, the PLL is turned off and bypassed for test purposes.  
When both clock inputs (CK, CK) are logic low, the device enters in a low power mode. An input logic detection  
circuit on the differential inputs, independent from input buffers, detects the logic low level and performs in a low  
power state where all outputs, the feedback, and the PLL are off. When the clock inputs transition from being  
logic low to being differential signals, the PLL turns back on, the inputs and the outputs are enabled, and the  
PLL obtains phase lock between the feedback clock pair (FBIN, FBIN) and the clock input pair (CK, CK) within  
the specified stabilization time.  
The CDCU877B is able to track spread spectrum clocking (SSC) for reduced EMI. This device operates from  
—40°C to 85°C.  
ORDERING INFORMATION  
(1)  
TA  
52-BALL BGA  
-40°C to 70°C  
CDCU877BZQL  
(1) For the most current package and ordering information, see the  
Package Option Addendum at the end of this document, or see the  
TI website at www.ti.com.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
MicroStar is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2005–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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CDCU877BZQLR 替代型号

型号 品牌 替代类型 描述 数据表
CDCU877AZQLT TI

类似代替

 暂无描述
CDCUA877ZQLR TI

类似代替

 1.8-V PHASE LOCK LOOP CLOCK DRIVER

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CDCU877RHAR TI

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CDCU877RHAT TI

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CDCU877RHATG4 TI

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CDCU877RTB TI

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CDCU877RTBR TI

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CDCU877RTBT TI

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