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CDCE937_10 PDF预览

CDCE937_10

更新时间: 2024-09-29 09:21:15
品牌 Logo 应用领域
德州仪器 - TI 石英晶振压控振荡器时钟
页数 文件大小 规格书
30页 481K
描述
Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V and 3.3-V LVCMOS Outputs

CDCE937_10 数据手册

 浏览型号CDCE937_10的Datasheet PDF文件第2页浏览型号CDCE937_10的Datasheet PDF文件第3页浏览型号CDCE937_10的Datasheet PDF文件第4页浏览型号CDCE937_10的Datasheet PDF文件第5页浏览型号CDCE937_10的Datasheet PDF文件第6页浏览型号CDCE937_10的Datasheet PDF文件第7页 
CDCE937  
CDCEL937  
www.ti.com  
SLAS564F AUGUST 2007REVISED MARCH 2010  
Programmable 3-PLL VCXO Clock Synthesizer  
With 1.8-V, 2.5-V and 3.3-V LVCMOS Outputs  
Check for Samples: CDCE937, CDCEL937  
1
FEATURES  
1.8-V Device Power Supply  
Flexible Clock Driver  
234  
Member of Programmable Clock Generator  
Family  
Three User-Definable Control Inputs  
[S0/S1/S2] e.g., SSC Selection, Frequency  
Switching, Output Enable or Power Down  
CDCE913/CDCEL913: 1-PLL, 3 Outputs  
CDCE925/CDCEL925: 2-PLL, 5 Outputs  
CDCE937/CDCEL937: 3-PLL, 7 Outputs  
CDCE949/CDCEL949: 4-PLL, 9 Outputs  
Generates Highly Accurate Clocks for  
Video, Audio, USB, IEEE1394, RFID,  
Bluetooth™, WLAN, Ethernet™, and GPS  
In-System Programmability and EEPROM  
Generates Common Clock Frequencies  
Used With TI DaVinci™, OMAP™, DSPs  
Serial Programmable Volatile Register  
Nonvolatile EEPROM to Store Customer  
Setting  
Programmable SSC Modulation  
Enables 0-PPM Clock Generation  
Flexible Input Clocking Concept  
Wide Temperature Range –40° C to 85° C  
Packaged in TSSOP  
External Crystal: 8 MHz to 32 MHz  
On-Chip VCXO: Pull Range ±150 ppm  
Single-Ended LVCMOS up to 160 MHz  
Development and Programming Kit for Easy  
PLL Design and Programming (TI Pro-Clock™)  
Selectable Output Frequency up to 230 MHz  
Low-Noise PLL Core  
APPLICATIONS  
D-TV, HD-TV, STB, IP-STB, DVD-Player,  
DVD-Recorder, Printer  
Integrated PLL Loop Filter Components  
Low Period Jitter (Typ 60 ps)  
Separate Output Supply Pins  
CDCE937: 3.3 V and 2.5 V  
CDCEL937: 1.8 V  
Vddout  
V
GND  
DD  
Vctr  
LV  
Y1  
CMOS  
VCXO  
XO  
LV  
LVCMOS  
Y2  
CMOS  
PLL1  
Xin/Clk  
S0  
1
2
3
4
5
20 Xout  
EEPROM  
Programming  
and  
with SSC  
3
19  
18  
S1/SDA  
S2/SCL  
LV  
S2/S1/S0 or  
SDA/SCL  
Y3  
Y4  
CMOS  
Vdd  
Control Register  
Vctr  
GND  
17 Y1  
Divider  
and  
Output  
Control  
LV  
16 GND  
15 Y2  
CMOS  
Vddout 6  
PLL2  
Y4  
Y5  
7
8
9
14 Y3  
with SSC  
LV  
13 Vddout  
12 Y6  
11 Y7  
Y5  
Y6  
CMOS  
GND  
Vddout 10  
LV  
CMOS  
PLL3  
with SSC  
LV  
CMOS  
Y7  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
4
DaVinci, OMAP, Pro-Clock are trademarks of Texas Instruments.  
Bluetooth is a trademark of Bluetooth SIG.  
Ethernet is a trademark of Xerox Corporattion.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2007–2010, Texas Instruments Incorporated  
 

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