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CDCE913-Q1 PDF预览

CDCE913-Q1

更新时间: 2023-09-03 20:37:40
品牌 Logo 应用领域
德州仪器 - TI 时钟石英晶振压控振荡器
页数 文件大小 规格书
37页 1138K
描述
具有 2.5V 或 3.3V LVCMOS 输出的汽车类可编程 1-PLL VCXO 时钟合成器

CDCE913-Q1 数据手册

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CDCE913-Q1, CDCEL913-Q1  
SCAS918C JUNE 2013REVISED NOVEMBER 2016  
CDCEx913-Q1 Programmable 1-PLL VCXO Clock Synthesizer  
With 1.8-V, 2.5-V, and 3.3-V Outputs  
1 Features  
2 Applications  
1
Qualified for Automotive Applications  
Clusters  
AEC-Q100 Qualified With the Following Results:  
Head Units  
Navigation Systems  
Device Temperature Grades  
Advanced Driver Assistance Systems (ADAS)  
Grade 1 For CDCE913-Q1: –40°C to  
+125°C Ambient Operating Temperature  
3 Description  
The CDCE913-Q1 and CDCEL913-Q1 devices are  
Grade 3 For CDCEL913-Q1: –40°C to  
+85°C Ambient Operating Temperature  
modular,  
phase-locked  
loop  
(PLL)  
based  
Device HBM ESD Classification Level H2  
Device CDM ESD Classification Level C6  
programmable clock synthesizers. These devices  
provide flexible and programmable options, such as  
output clocks, input signals, and control pins, so that  
the user can configure the CDCEx913-Q1 for their  
own specifications.  
In-System Programmability and EEPROM  
Serial Programmable Volatile Register  
Nonvolatile EEPROM to Store Customer  
Settings  
The CDCEx913-Q1 generates up to three output  
clocks from a single input frequency to enable both  
board space and cost savings. Additionally, with  
multiple outputs, the clock generator can replace  
multiple crystals with one clock generator. This  
makes the device well-suited for head unit and  
telematics applications in infotainment and camera  
systems in ADAS as these platforms are evolving into  
smaller and more cost effective systems.  
Flexible Input Clocking Concept  
External Crystal: 8 MHz to 32 MHz  
On-Chip VCXO: Pull Range ±150 ppm  
Single-Ended LVCMOS up to 160 MHz  
Free Selectable Output Frequency up to 230 MHz  
Low-Noise PLL Core  
PLL Loop Filter Components Integrated  
Low Period Jitter (Typical 50 ps)  
Device Information(1)  
PART NUMBER  
CDCE913-Q1  
PACKAGE  
BODY SIZE (NOM)  
Separate Output Supply Pins  
TSSOP (14)  
5.00 mm × 4.40 mm  
CDCE913-Q1: 3.3 V and 2.5 V  
CDCEL913-Q1: 1.8 V  
CDCEL913-Q1  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
Flexible Clock Driver  
Three User-Definable Control Inputs [S0, S1,  
S2], for Example, SSC Selection, Frequency  
Switching, Output Enable, or Power Down  
Simplified Schematic  
Digital Radio  
Interface  
Generates Highly Accurate Clocks for Video,  
Audio, USB, IEEE1394, RFID, Bluetooth®,  
WLAN, Ethernet, and GPS  
Codec  
Generates Common Clock Frequencies Used  
With TI-DaVinci™, OMAP™, DSPs  
CDCE913-Q1  
Programmable SSC Modulation  
Enables 0-PPM Clock Generation  
Graphics  
Processor  
25 MHZ  
XTAL  
1.8-V Device Power Supply  
Packaged in TSSOP  
Copyright © 2016, Texas Instruments Incorporated  
Development and Programming Kit for Easy PLL  
Design and Programming (TI Pro-Clock™)  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
 
 

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