CDC392DBLE

更新时间： 2024-09-25 13:06:43

品牌	Logo	应用领域
德州仪器 - TI		时钟驱动器输出元件
页数	文件大小	规格书
8页	129K
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CDC392DBLE 数据手册

CDC392

1-LINE TO 6-LINE CLOCK DRIVER

WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS

SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995

D PACKAGE

(TOP VIEW)

Low Output Skew for Clock-Distribution

and Clock-Generation Applications

TTL-Compatible Inputs and

CMOS-Compatible Outputs

1Y1

1T/C

GND

1Y2

1Y3

GND

2Y1

2Y2

GND

3Y1

Distributes One Clock Input to Six Clock

Outputs

2T/C

Polarity Control Selects True or

Complementary Outputs

3T/C

Distributed V

Switching Noise

and GND Pins Reduce

High-Drive Outputs (–32-mA I

32-mA I

)

State-of-the-Art EPIC-ΙΙB BiCMOS Design

Significantly Reduces Power Dissipation

Packaged In Plastic Small-Outline Package

description

The CDC392 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew

for clock distribution. Through the use of the polarity-control (T/C) inputs, various combinations of true and

complementary outputs can be obtained. The output-enable (OE) input is provided to disable the outputs to a

high-impedance state.

The CDC392 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

INPUTS

OUTPUT

T/C

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

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