Datasheet > CD82C37A-12

CD82C37A-12

更新时间： 2024-11-25 22:13:39

品牌	Logo	应用领域
英特矽尔 - INTERSIL		外围集成电路控制器时钟
页数	文件大小	规格书
23页	150K
描述
CMOS High Performance Programmable DMA Controller

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中文翻译

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数据手册

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CD82C37A-12 数据手册

82C37A

CMOS High Performance

Programmable DMA Controller

March 1997

Features

Description

• Compatible with the NMOS 8237A

The 82C37A is an enhanced version of the industry standard

8237A Direct Memory Access (DMA) controller, fabricated

using Intersil’s advanced 2 micron CMOS process. Pin

compatible with NMOS designs, the 82C37A offers

increased functionality, improved performance, and

dramatically reduced power consumption. The fully static

design permits gated clock operation for even further

reduction of power.

• Four Independent Maskable Channels with Autoinitial-

ization Capability

• Cascadable to any Number of Channels

• High Speed Data Transfers:

- Up to 4MBytes/sec with 8MHz Clock

- Up to 6.25MBytes/sec with 12.5MHz Clock

The 82C37A controller can improve system performance by

allowing external devices to transfer data directly to or from

system memory. Memory-to-memory transfer capability is

also provided, along with a memory block initialization fea-

ture. DMA requests may be generated by either hardware or

software, and each channel is independently programmable

with a variety of features for ﬂexible operation.

• Memory-to-Memory Transfers

• Static CMOS Design Permits Low Power Operation

- ICCSB = 10µA Maximum

- ICCOP = 2mA/MHz Maximum

• Fully TTL/CMOS Compatible

The 82C37A is designed to be used with an external

address latch, such as the 82C82, to demultiplex the most

signiﬁcant 8-bits of address. The 82C37A can be used with

industry standard microprocessors such as 80C286, 80286,

80C86, 80C88, 8086, 8088, 8085, Z80, NSC800, 80186 and

others. Multimode programmability allows the user to select

from three basic types of DMA services, and reconﬁguration

under program control is possible even with the clock to the

controller stopped. Each channel has a full 64K address and

word count range, and may be programmed to autoinitialize

these registers following DMA termination (end of process).

• Internal Registers may be Read from Software

Ordering Information

PART NUMBER

TEMPERATURE

5MHz

CP82C37A-5

8MHz

CP82C37A

12.5MHz

CP82C37A-12

IP82C37A-12

PACKAGE

40 Ld PDIP

RANGE

PKG. NO.

E40.6

0 C to +70 C

IP82C37A-5

IP82C37A

-40 C to +85 C

E40.6

CS82C37A-5

CS82C37A

CS82C37A-12

IS82C37A-12

44 Ld PLCC

0 C to +70 C

N44.65

F40.6

IS82C37A-5

IS82C37A

-40 C to +85 C

CD82C37A-5

CD82C37A

CD82C37A-12

ID82C37A-12

40 Ld CERDIP

0 C to +70 C

ID82C37A-5

ID82C37A

-40 C to +85 C

F40.6

MD82C37A-5/B

5962-9054301MQA

MR82C37A-5/B

5962-9054301MXA

MD82C37A/B

5962-9054302MQA

MR82C37A/B

5962-9054302MXA

MD82C37A-12/B

5962-9054303MQA

MR82C37A-12/B

5962-9054303MXA

-55 C to +125 C

F40.6

SMD#

F40.6

44 Pad CLCC

SMD#

-55 C to +125 C

J44.A

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 2967.1

12 3 4 5 6 7...23

中文翻译

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与CD82C37A-12相关器件

型号	品牌	获取价格	描述	数据表
CD82C37A-5	INTERSIL	获取价格	CMOS High Performance Programmable DMA Controller
CD82C37A-5	HARRIS	获取价格	CMOS High Performance Programmable DMA Controller
CD82C50A	ETC	获取价格	UART
CD82C50A-5	INTERSIL	获取价格	CMOS Asynchronous Communications Element
CD82C52	INTERSIL	获取价格	CMOS Serial Controller Interface
CD82C54	INTERSIL	获取价格	CMOS Programmable Interval Timer
CD82C54-10	INTERSIL	获取价格	CMOS Programmable Interval Timer
CD82C54-12	INTERSIL	获取价格	CMOS Programmable Interval Timer
CD82C55A	INTERSIL	获取价格	CMOS Programmable Peripheral Interface
CD82C55A	HARRIS	获取价格	CMOS Programmable Peripheral Interface

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