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CD74HCT40103

更新时间： 2024-09-14 23:04:31

品牌	Logo	应用领域
德州仪器 - TI		计数器
页数	文件大小	规格书
9页	47K
描述
High Speed CMOS Logic 8-Stage Synchronous Down Counters

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数据手册

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CD74HCT40103 数据手册

CD74HC40103,

CD74HCT40103

Data sheet acquired from Harris Semiconductor

SCHS221

High Speed CMOS Logic

November 1997

8-Stage Synchronous Down Counters

Features

Description

• Synchronous or Asynchronous Preset

• Cascadable in Synchronous or Ripple Mode

The Harris CD74HC40103 and CD74HCT40103 are

manufactured with high speed silicon gate technology and

consist of an 8-stage synchronous down counter with a

single output which is active when the internal count is zero.

The 40103 contains a single 8-bit binary counter. Each has

control inputs for enabling or disabling the clock, for clearing

the counter to its maximum count, and for presetting the

[ /Title

(CD74H

C40103,

CD74H

CT4010

/Sub-

ject

(High

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55 C to 125 C counter either synchronously or asynchronously. All control

inputs and the TC output are active-low logic.

• Balanced Propagation Delay and Transition Times

In normal operation, the counter is decremented by one

• Signiﬁcant Power Reduction Compared to LSTTL

count on each positive transition of the CLOCK (CP).

Logic ICs

Counting is inhibited when the TE input is high. The TC

output goes low when the count reaches zero if the TE input

is low, and remains low for one full clock period.

• HC Types

Speed

CMOS

Logic 8-

- 2V to 6V Operation

- High Noise Immunity: N = 30%, N = 30% of V

When the PE input is low, data at the P0-P7 inputs are

clocked into the counter on the next positive clock transition

regardless of the state of the TE input. When the PL input is

low, data at the P0-P7 inputs are asynchronously forced into

the counter regardless of the state of the PE, TE, or CLOCK

inputs. Input P0-P7 represent a single 8-bit binary word for

the 40103. When the MR input is low, the counter is

at V

= 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

- CMOS Input Compatibility, I ≤ 1µA at V , V

asynchronously cleared to its maximum count of 255 ,

OL OH

regardless of the state of any other input. The precedence

relationship between control inputs is indicated in the truth

table.

Ordering Information

PKG.

NO.

If all control inputs except TE are high at the time of zero

count, the counters will jump to the maximum count, giving a

counting sequence of 100 or 256 clock pulses long.

PART NUMBER TEMP. RANGE ( C) PACKAGE

CD74HC40103E

CD74HCT40103E

CD74HC40103M

CD74HCT40103M

NOTES:

-55 to 125

16 Ld PDIP E16.3

16 Ld SOIC M16.15

The 40103 may be cascaded using the TE input and the TC

output, in either a synchronous or ripple mode. These

circuits possess the the low power consumption usually

associated with CMOS circuitry, yet have speeds

comparable to low power Schottky TTL circuits and can drive

up to 10 LSTTL loads.

1. When ordering, use the entire part number. Add the sufﬁx 96 to

obtain the variant in the tape and reel.

2. Wafer or die for this part number is available which meets all elec-

trical specifications. Please contact your local sales office or

Harris customer service for ordering information.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

File Number 1596.1

12 3 4 5 6 7...9

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与CD74HCT40103相关器件

型号	品牌	获取价格	描述	数据表
CD74HCT40103E	TI	获取价格	High Speed CMOS Logic 8-Stage Synchronous Down Counters
CD74HCT40103EE4	TI	获取价格	High-Speed CMOS Logic 8-Stage Synchronous Down Counters
CD74HCT40103EN	ETC	获取价格	Logic IC
CD74HCT40103EX	RENESAS	获取价格	HCT SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT DOWN BINARY COUNTER, PDIP16
CD74HCT40103F	ETC	获取价格	Logic IC
CD74HCT40103H	ETC	获取价格	Synchronous Down Counter
CD74HCT40103M	TI	获取价格	High Speed CMOS Logic 8-Stage Synchronous Down Counters
CD74HCT40103M96	TI	获取价格	High-Speed CMOS Logic 8-Stage Synchronous Down Counters
CD74HCT40103M96E4	TI	获取价格	High-Speed CMOS Logic 8-Stage Synchronous Down Counters
CD74HCT40103M96G4	TI	获取价格	High-Speed CMOS Logic 8-Stage Synchronous Down Counters

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