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CD74HCT32M96G4 PDF预览

CD74HCT32M96G4

更新时间: 2024-11-20 05:18:23
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
13页 413K
描述
High-Speed CMOS Logic Quad 2-Input OR Gate

CD74HCT32M96G4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.38
Is Samacsys:N系列:HCT
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE最大I(ol):0.004 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):0.04 mAProp。Delay @ Nom-Sup:36 ns
传播延迟(tpd):36 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

CD74HCT32M96G4 数据手册

 浏览型号CD74HCT32M96G4的Datasheet PDF文件第2页浏览型号CD74HCT32M96G4的Datasheet PDF文件第3页浏览型号CD74HCT32M96G4的Datasheet PDF文件第4页浏览型号CD74HCT32M96G4的Datasheet PDF文件第5页浏览型号CD74HCT32M96G4的Datasheet PDF文件第6页浏览型号CD74HCT32M96G4的Datasheet PDF文件第7页 
CD54HC32, CD74HC32,  
CD54HCT32, CD74HCT32  
Data sheet acquired from Harris Semiconductor  
SCHS274C  
High-Speed CMOS Logic  
Quad 2-Input OR Gate  
September 1997 - Revised September 2003  
Features  
Description  
• Typical Propagation Delay: 7ns at V  
CC  
= 5V,  
The ’HC32 and ’HCT32 contain four 2-input OR gates in one  
package. Logic gates utilize silicon gate CMOS technology  
to achieve operating speeds similar to LSTTL gates with the  
low power consumption of standard CMOS integrated cir-  
cuits. All devices have the ability to drive 10 LSTTL loads.  
The HCT logic family is functionally pin compatible with the  
standard LS logic family.  
o
C = 15pF, T = 25 C  
L
A
[ /Title  
(CD54  
HCT32  
,
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
CD74  
HC32,  
CD74  
HCT32  
)
/Sub-  
ject  
(High  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
TEMP. RANGE  
o
PART NUMBER  
CD54HC32F3A  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
• HC Types  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- 2V to 6V Operation  
CD54HCT32F3A  
CD74HC32E  
- High Noise Immunity: N = 30%, N = 30% of V  
CC  
IL  
IH  
at V  
= 5V  
CC  
• HCT Types  
CD74HC32M  
- 4.5V to 5.5V Operation  
CD74HC32MT  
CD74HC32M96  
CD74HCT32E  
CD74HCT32M  
CD74HCT32MT  
CD74HCT32M96  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
Pinout  
CD54HC32, CD54HCT32  
(CERDIP)  
CD74HC32, CD74HCT32  
(PDIP, SOIC)  
TOP VIEW  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 4B  
12 4A  
11 4Y  
10 3B  
1Y  
2A  
2B  
2Y  
9
8
3A  
3Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated.  
1

CD74HCT32M96G4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HCT32MTG4 TI

完全替代

High-Speed CMOS Logic Quad 2-Input OR Gate
CD74HCT32ME4 TI

完全替代

High-Speed CMOS Logic Quad 2-Input OR Gate
CD74HCT32MT TI

完全替代

High-Speed CMOS Logic Quad 2-Input OR Gate

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