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CD74HCT30 PDF预览

CD74HCT30

更新时间: 2024-01-04 19:12:16
品牌 Logo 应用领域
德州仪器 - TI
页数 文件大小 规格书
6页 37K
描述
High Speed CMOS Logic 8-Input NAND Gate

CD74HCT30 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP14,.25Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDSO-G14
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.004 A
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:5 VProp。Delay @ Nom-Sup:42 ns
施密特触发器:NO子类别:Gates
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

CD74HCT30 数据手册

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CD54HC30, CD74HC30,  
CD74HCT30  
Data sheet acquired from Harris Semiconductor  
SCHS121  
High Speed CMOS Logic  
8-Input NAND Gate  
August 1997  
Features  
Description  
• Buffered Inputs  
The Harris CD74HC30, CD74HCT30, each contain an 8-input  
NAND gate in one package. They provide the system  
designer with the direct implementation of the positive logic  
8-input NAND function. Logic gates utilize silicon gate  
CMOS technology to achieve operating speeds similar to  
LSTTL gates with the low power consumption of standard  
CMOS integrated circuits. All devices have the ability to drive  
10 LSTTL loads. The 74HCT logic family is functionally pin  
• Typical Propagation Delay: 10ns at V  
o
= 5V,  
[ /Title  
(CD54H  
C30,  
CD74H  
C30,  
CC  
C = 15pF, T = 25 C  
L
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C compatible with the standard 74LS logic family.  
CD74H  
CT30)  
/Subject  
(High  
Speed  
CMOS  
Logic 8-  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
TEMP. RANGE  
PKG.  
NO.  
o
PART NUMBER  
CD74HC30E  
CD74HCT30E  
CD74HC30M  
CD74HCT30M  
CD54HCT30H  
NOTES:  
( C)  
PACKAGE  
14 Ld PDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
Die  
• HC Types  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
E14.3  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
E14.3  
at V  
= 5V  
CC  
M14.15  
M14.15  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2. Die for this part number is available which meets all electrical  
specifications. Please contact your local sales office or Harris  
customer service for ordering information.  
Pinout  
CD54HC30, CD74HC30, CD74HCT30  
(PDIP, CERDIP, SOIC)  
TOP VIEW  
A
B
1
2
3
4
5
6
7
14  
13 NC  
12  
V
CC  
C
H
D
11 G  
E
10 NC  
F
9
8
NC  
Y
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1652.1  
Copyright © Harris Corporation 1997  
1

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