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CD74HCT21MG4 PDF预览

CD74HCT21MG4

更新时间: 2024-11-04 02:54:47
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
13页 411K
描述
High-Speed CMOS Logic Dual 4-Input AND Gate

CD74HCT21MG4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-14
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.39Is Samacsys:N
系列:HCTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:AND GATE
最大I(ol):0.004 A湿度敏感等级:1
功能数量:2输入次数:4
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TUBE峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:41 ns
传播延迟(tpd):41 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gate最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

CD74HCT21MG4 数据手册

 浏览型号CD74HCT21MG4的Datasheet PDF文件第2页浏览型号CD74HCT21MG4的Datasheet PDF文件第3页浏览型号CD74HCT21MG4的Datasheet PDF文件第4页浏览型号CD74HCT21MG4的Datasheet PDF文件第5页浏览型号CD74HCT21MG4的Datasheet PDF文件第6页浏览型号CD74HCT21MG4的Datasheet PDF文件第7页 
CD54HC21, CD74HC21,  
CD74HCT21  
Data sheet acquired from Harris Semiconductor  
SCHS131C  
High-Speed CMOS Logic  
Dual 4-Input AND Gate  
August 1997 - Revised September 2003  
Features  
Description  
• Buffered Inputs  
The ’HC21 and CD74HCT21 logic gates utilize silicon gate  
CMOS technology to achieve operating speeds similar to  
LSTTL gates with the low power consumption of standard  
CMOS integrated circuits. All devices have the ability to drive  
10 LSTTL loads. The HCT logic family is functionally pin  
compatible with the standard LS logic family.  
• Typical Propagation Delay: 9ns at V  
o
= 5V,  
[ /Title  
(CD74H  
C21,  
CD74H  
CT21)  
/Subject  
(High  
Speed  
CMOS  
Logic  
Dual 4-  
Input  
CC  
C = 15pF, T = 25 C  
L
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC21F3A  
CD74HC21E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• HC Types  
- 2V to 6V Operation  
CD74HC21M  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
CD74HC21MT  
CD74HC21M96  
CD74HCT21E  
CD74HCT21M  
CD74HCT21MT  
CD74HCT21M96  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
CD54HC21  
(CERDIP)  
CD74HC21, CD74HCT21  
(PDIP, SOIC)  
TOP VIEW  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 2D  
12 2C  
11 NC  
10 2B  
NC  
1C  
1D  
1Y  
9
8
2A  
2Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HCT21MG4 替代型号

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CD74HCT21MTE4 TI

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