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CD74HCT125E PDF预览

CD74HCT125E

更新时间: 2024-10-31 23:04:27
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 39K
描述
High Speed CMOS Logic Quad Buffer, Three-State

CD74HCT125E 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:1.12
其他特性:DUMMY VAL控制类型:ENABLE LOW
计数方向:UNIDIRECTIONAL系列:HCT
JESD-30 代码:R-PDIP-T14JESD-609代码:e4
长度:19.3 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:38 ns传播延迟(tpd):38 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceiver最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.35 mmBase Number Matches:1

CD74HCT125E 数据手册

 浏览型号CD74HCT125E的Datasheet PDF文件第2页浏览型号CD74HCT125E的Datasheet PDF文件第3页浏览型号CD74HCT125E的Datasheet PDF文件第4页浏览型号CD74HCT125E的Datasheet PDF文件第5页浏览型号CD74HCT125E的Datasheet PDF文件第6页浏览型号CD74HCT125E的Datasheet PDF文件第7页 
CD74HC125,  
CD74HCT125  
Data sheet acquired from Harris Semiconductor  
SCHS143  
High Speed CMOS Logic  
Quad Buffer, Three-State  
November 1997  
Features  
Description  
• Three-State Outputs  
The Harris CD74HC125 and CD74HCT125 contain 4 inde-  
pendent three-state buffers, each having its own output  
enable input, which when “HIGH” puts the output in the high  
impedance state  
• Separate Output Enable Inputs  
[ /Title  
(CD74  
HC125  
,
CD74  
HCT12  
5)  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
PKG.  
NO.  
o
PART NUMBER  
CD74HC125E  
CD74HCT125E  
CD74HC125M  
CD74HCT125M  
NOTES:  
( C)  
PACKAGE  
14 Ld PDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
E14.3  
/Sub-  
ject  
• HC Types  
- 2V to 6V Operation  
E14.3  
M14.15  
M14.15  
- High Noise Immunity: N = 30%, N = 30% of V  
CC  
(High  
Speed  
CMOS  
Logic  
Quad  
Buffer,  
Three-  
State)  
IL  
IH  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL  
IH  
- CMOS Input Compatibility, I 1µA at V , V  
2. Wafer and die for this part number is available which meets all  
electrical specifications. Please contact your local sales office or  
Harris customer service for ordering information.  
l
OL OH  
Pinout  
CD74HC125, CD74HCT125  
(PDIP, SOIC)  
TOP VIEW  
1OE  
1A  
1
2
3
4
5
6
7
14 V  
CC  
13 4OE  
12 4A  
1Y  
2OE  
2A  
11 4Y  
10 3OE  
2Y  
9
8
3A  
3Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1771.1  
Copyright © Harris Corporation 1997  
1

CD74HCT125E 替代型号

型号 品牌 替代类型 描述 数据表
CD54HCT125F3A TI

完全替代

High-Speed CMOS Logic Quad Buffer, Three-State
CD54HC125F3A TI

完全替代

High-Speed CMOS Logic Quad Buffer, Three-State
M74HCT125B1R STMICROELECTRONICS

完全替代

QUAD BUS BUFFER (3-STATE)

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