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CD74HC4050

更新时间： 2024-11-01 23:07:31

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
5页	31K
描述
High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

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数据手册
替代型号

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CD74HC4050 数据手册

CD74HC4049,

CD74HC4050

Data sheet acquired from Harris Semiconductor

SCHS205A

High-Speed CMOS Logic

February 1998 - Revised June 1999

Hex Buffers, Inverting and Non-Inverting

Features

Description

• Typical Propagation Delay: 6ns at V

= 5V,

The CD74HC4049 and CD74HC4050 are fabricated with

high-speed silicon gate technology. They have a modiﬁed

input protection structure that enables these parts to be

used as logic level translators which convert high-level logic

to a low-level logic while operating off the low-level logic

supply. For example, 15-V input pulse levels can be down-

converted to 0-V to 5-V logic levels. The modiﬁed input

protection structure protects the input from negative

C = 15pF, T = 25 C

[ /Title

(CD74H

C4049,

CD74H

C4050)

/Sub-

• High-to-Low Voltage Level Converter for up to V = 16V

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . .–55 C to 125 C electrostatic discharge. These parts also can be used as

simple buffers or inverters without level translation. The

CD74HC4049 and CD74HC4050 are enhanced versions of

ject

• Balanced Propagation Delay and Transition Times

(High

Speed

CMOS

Logic

Hex

equivalent CMOS types.

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

Ordering Information

• HC Types

- 2V to 6V Operation

TEMP. RANGE

PKG.

NO.

PART NUMBER

CD74HC4049E

CD74HC4050E

CD74HC4049M

CD74HC4050M

CD74HC4050PW

NOTES:

( C)

PACKAGE

16 Ld PDIP

16 Ld SOIC

16 Ld TSSOP

- High Noise Immunity: N = 30%, N = 30%of V

IL IH CC

= 5V

–55 to 125

E16.3

M16.15

1. When ordering, use the entire part number. Add the sufﬁx 96 to

the M sufﬁx or the R sufﬁx to the PW package to obtain the

variant in the tape and reel.

2. Wafer and die is available which meets all electrical

specifications. Please contact your local sales office or

customer service for ordering information.

Pinout

CD74HC4049, CD74HC4050

(PDIP, SOIC, TSSOP)

TOP VIEW

4049 4050

4050

16 NC

4049

15 6Y

14 6A

13 NC

12 5Y

11 5A

10 4Y

GND GND

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5

中文翻译

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CD74HC4050 替代型号

型号	品牌	替代类型	描述	数据表
CD74HC4050NSRG4	TI	功能相似	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD54HC4050	TI	功能相似	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

与CD74HC4050相关器件

型号	品牌	获取价格	描述	数据表
CD74HC4050E	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050EE4	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050EN	ETC	获取价格	Logic IC
CD74HC4050EX	RENESAS	获取价格	CD74HC4050EX
CD74HC4050F	ETC	获取价格	Logic IC
CD74HC4050H	ETC	获取价格	Hex Buffer
CD74HC4050M	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050M96	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4050M96	RENESAS	获取价格	NON-INVERT GATE
CD74HC4050M96E4	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

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