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CD74HC4049E PDF预览

CD74HC4049E

更新时间: 2024-11-01 23:07:31
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 31K
描述
High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting

CD74HC4049E 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:1.45
其他特性:CMOS-TTL LEVEL TRANSLATOR系列:HC/UH
JESD-30 代码:R-PDIP-T16JESD-609代码:e4
长度:19.3 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.004 A
功能数量:6输入次数:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:26 ns传播延迟(tpd):130 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.35 mm
Base Number Matches:1

CD74HC4049E 数据手册

 浏览型号CD74HC4049E的Datasheet PDF文件第2页浏览型号CD74HC4049E的Datasheet PDF文件第3页浏览型号CD74HC4049E的Datasheet PDF文件第4页浏览型号CD74HC4049E的Datasheet PDF文件第5页 
CD74HC4049,  
CD74HC4050  
Data sheet acquired from Harris Semiconductor  
SCHS205A  
High-Speed CMOS Logic  
February 1998 - Revised June 1999  
Hex Buffers, Inverting and Non-Inverting  
Features  
Description  
• Typical Propagation Delay: 6ns at V  
o
= 5V,  
The CD74HC4049 and CD74HC4050 are fabricated with  
high-speed silicon gate technology. They have a modified  
input protection structure that enables these parts to be  
used as logic level translators which convert high-level logic  
to a low-level logic while operating off the low-level logic  
supply. For example, 15-V input pulse levels can be down-  
converted to 0-V to 5-V logic levels. The modified input  
protection structure protects the input from negative  
CC  
C = 15pF, T = 25 C  
L
A
[ /Title  
(CD74H  
C4049,  
CD74H  
C4050)  
/Sub-  
• High-to-Low Voltage Level Converter for up to V = 16V  
l
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . .55 C to 125 C electrostatic discharge. These parts also can be used as  
simple buffers or inverters without level translation. The  
CD74HC4049 and CD74HC4050 are enhanced versions of  
ject  
• Balanced Propagation Delay and Transition Times  
(High  
Speed  
CMOS  
Logic  
Hex  
equivalent CMOS types.  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
• HC Types  
- 2V to 6V Operation  
TEMP. RANGE  
o
PKG.  
NO.  
PART NUMBER  
CD74HC4049E  
CD74HC4050E  
CD74HC4049M  
CD74HC4050M  
CD74HC4050PW  
NOTES:  
( C)  
PACKAGE  
16 Ld PDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld TSSOP  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH CC  
at  
V
= 5V  
CC  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
–55 to 125  
E16.3  
E16.3  
M16.15  
M16.15  
1. When ordering, use the entire part number. Add the suffix 96 to  
the M suffix or the R suffix to the PW package to obtain the  
variant in the tape and reel.  
2. Wafer and die is available which meets all electrical  
specifications. Please contact your local sales office or  
customer service for ordering information.  
Pinout  
CD74HC4049, CD74HC4050  
(PDIP, SOIC, TSSOP)  
TOP VIEW  
4049 4050  
4050  
16 NC  
4049  
NC  
V
V
1
2
3
4
5
6
7
8
CC  
1Y  
CC  
1Y  
15 6Y  
14 6A  
13 NC  
12 5Y  
11 5A  
10 4Y  
6Y  
6A  
NC  
5Y  
5A  
4Y  
4A  
1A  
2Y  
2A  
3Y  
3A  
1A  
2Y  
2A  
3Y  
3A  
9
4A  
GND GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 1999 Texas Instruments Incorporated  
1

CD74HC4049E 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4049EE4 TI

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High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
M74HC4049B1R STMICROELECTRONICS

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