Datasheet > 信号电路 > 锁相环或频率合成电路> CD74HC4046APWRE4

CD74HC4046APWRE4

更新时间： 2024-11-24 22:39:11

品牌	Logo	应用领域
德州仪器 - TI		信号电路锁相环或频率合成电路光电二极管
页数	文件大小	规格书
28页	436K
描述
High-Speed CMOS Logic Phase-Locked Loop with VCO

阅读下载

中文翻译

获取价格

技术参数
数据手册
替代型号

如果您发现信息不准确，欢迎纠错

CD74HC4046APWRE4 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	TSSOP
包装说明：	TSSOP-16	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	6 weeks
风险等级：	5.12	Is Samacsys：	N
模拟集成电路 - 其他类型：	PHASE LOCKED LOOP	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e4	长度：	5 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	电源：	2/6 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	PLL or Frequency Synthesis Circuits	最大供电电流 (Isup)：	204 mA
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	4.4 mm
Base Number Matches：	1

CD74HC4046APWRE4 数据手册

CD54HC4046A, CD74HC4046A,

CD54HCT4046A, CD74HCT4046A

Data sheet acquired from Harris Semiconductor

SCHS204J

High-Speed CMOS Logic

February 1998 - Revised December 2003

Phase-Locked Loop with VCO

Features

Description

• Operating Frequency Range

The ’HC4046A and ’HCT4046A are high-speed silicon-gate

CMOS devices that are pin compatible with the CD4046B of

the “4000B” series. They are specified in compliance with

- Up to 18MHz (Typ) at V

= 5V

[ /Title

(CD74

HC404

6A,

CD74

HCT40

46A)

/Sub-

ject

(High-

Speed

CMOS

- Minimum Center Frequency of 12MHz at V

= 4.5V

JEDEC standard number 7.

• Choice of Three Phase Comparators

- EXCLUSIVE-OR

The ’HC4046A and ’HCT4046A are phase-locked-loop

circuits that contain a linear voltage-controlled oscillator

(VCO) and three different phase comparators (PC1, PC2 and

PC3). A signal input and a comparator input are common to

each comparator.

- Edge-Triggered JK Flip-Flop

- Edge-Triggered RS Flip-Flop

• Excellent VCO Frequency Linearity

The signal input can be directly coupled to large voltage

signals, or indirectly coupled (with a series capacitor) to small

voltage signals. A self-bias input circuit keeps small voltage

signals within the linear region of the input amplifiers. With a

passive low-pass filter, the 4046A forms a second-order loop

PLL. The excellent VCO linearity is achieved by the use of

linear op-amp techniques.

• VCO-Inhibit Control for ON/OFF Keying and for Low

Standby Power Consumption

• Minimal Frequency Drift

• Operating Power Supply Voltage Range

- VCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6V

- Digital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6V

Ordering Information

• Fanout (Over Temperature Range)

TEMP. RANGE

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

PART NUMBER

CD54HC4046AF3A

CD54HCT4046AF3A

CD74HC4046AE

( C)

PACKAGE

16 Ld CERDIP

16 Ld PDIP

16 Ld SOIC

16 Ld SOP

-55 to 125

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

CD74HC4046AM

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

CD74HC4046AMT

CD74HC4046AM96

CD74HC4046ANSR

CD74HC4046APWR

CD74HC4046APWT

CD74HCT4046AE

CD74HCT4046AM

CD74HCT4046AMT

CD74HCT4046AM96

• HC Types

- 2V to 6V Operation

16 Ld TSSOP

16 Ld PDIP

16 Ld SOIC

- High Noise Immunity: N = 30%, N = 30% of V

IL IH CC

at V

= 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

IL IH

- CMOS Input Compatibility, I ≤ 1µA at VOL, VOH

NOTE: When ordering, use the entire part number. The sufﬁxes 96

and R denote tape and reel. The sufﬁx T denotes a small-quantity

reel of 250.

Applications

• FM Modulation and Demodulation

• Frequency Synthesis and Multiplication

• Frequency Discrimination

• Tone Decoding

• Data Synchronization and Conditioning

• Voltage-to-Frequency Conversion

• Motor-Speed Control

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...28

中文翻译

下载PDF

CD74HC4046APWRE4 替代型号

型号	品牌	替代类型	描述	数据表
CD74HC4046APWR	TI	类似代替	High-Speed CMOS Logic Phase-Locked Loop with VCO
CD74HC4046AE	TI	类似代替	High-Speed CMOS Logic Phase-Locked Loop with VCO

与CD74HC4046APWRE4相关器件

型号	品牌	获取价格	描述	数据表
CD74HC4046APWRG4	TI	获取价格	High-Speed CMOS Logic Phase-Locked Loop with VCO
CD74HC4046APWT	TI	获取价格	High-Speed CMOS Logic Phase-Locked Loop with VCO
CD74HC4046APWTE4	TI	获取价格	High-Speed CMOS Logic Phase-Locked Loop with VCO
CD74HC4046APWTG4	TI	获取价格	High-Speed CMOS Logic Phase-Locked Loop with VCO
CD74HC4049	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4049E	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4049EE4	TI	获取价格	High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting
CD74HC4049EN	ETC	获取价格	Logic IC
CD74HC4049EX	RENESAS	获取价格	IC,LOGIC GATE,HEX INVERTER,HC-CMOS,DIP,16PIN,PLASTIC
CD74HC4049F	ETC	获取价格	Logic IC

与CD74HC4046APWRE4相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

40
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

32
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

60
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

56

产品中心

服务支持

精选活动

关于我们

帮助中心

CD74HC4046APWRE4

CD74HC4046APWRE4 技术参数

CD74HC4046APWRE4 数据手册

CD74HC4046APWRE4 替代型号

与CD74HC4046APWRE4相关器件

与CD74HC4046APWRE4相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CD74HC4046APWRE4

CD74HC4046APWRE4 技术参数

CD74HC4046APWRE4 数据手册

CD74HC4046APWRE4 替代型号

与CD74HC4046APWRE4相关器件

与CD74HC4046APWRE4相关文章

您还可以找

您在本页遇到什么问题？