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CD74HC377E PDF预览

CD74HC377E

更新时间: 2024-11-01 23:00:39
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器
页数 文件大小 规格书
7页 57K
描述
High Speed CMOS Logic Octal D-Type Flip-Flop with Data Enable

CD74HC377E 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:DIP
包装说明:DIP-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.4Is Samacsys:N
其他特性:WITH HOLD MODE系列:HC/UH
JESD-30 代码:R-PDIP-T20JESD-609代码:e4
长度:24.33 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:20000000 Hz
最大I(ol):0.0052 A位数:8
功能数量:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V最大电源电流(ICC):0.08 mA
Prop。Delay @ Nom-Sup:53 ns传播延迟(tpd):265 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latch最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:6.35 mm
最小 fmax:23 MHzBase Number Matches:1

CD74HC377E 数据手册

 浏览型号CD74HC377E的Datasheet PDF文件第2页浏览型号CD74HC377E的Datasheet PDF文件第3页浏览型号CD74HC377E的Datasheet PDF文件第4页浏览型号CD74HC377E的Datasheet PDF文件第5页浏览型号CD74HC377E的Datasheet PDF文件第6页浏览型号CD74HC377E的Datasheet PDF文件第7页 
CD74HC377,  
CD74HCT377  
Data sheet acquired from Harris Semiconductor  
SCHS184  
High Speed CMOS Logic  
September 1997  
Octal D-Type Flip-Flop with Data Enable  
V
= 5V  
Features  
CC  
• HCT Types  
• Buffered Common Clock  
• Buffered Inputs  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
[ /Title  
(CD74  
HC377  
,
CD74  
HCT37  
7)  
• Typical Propagation Delay = 17ns at C = 15pF,  
V = 0.8V (Max), V = 2V (Min)  
L
IL IH  
o
V
= 5V, T = 25 C  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
CC  
A
l
• Fanout (Over Temperature Range)  
Description  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
The Harris CD74HC377 and CD74HCT377 are octal D-type  
flip-flops with a buffered clock (CP) common to all eight flip-  
flops. All the flip-flops are loaded simultaneously on the  
positive edge of the clock (CP) when the Data Enable (E) is  
Low.  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
/Sub-  
ject  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
(High  
Speed  
CMOS  
Logic  
Octal  
D-  
Ordering Information  
• HC Types  
PKG.  
NO.  
- 2V to 6V Operation  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH CC  
at  
CD74HC377E  
-55 to 125  
20 Ld PDIP  
E20.3  
Type  
Flip-  
Pinout  
CD74HC377, CD74HCT377  
(PDIP, SOIC)  
TOP VIEW  
1
2
3
4
5
6
7
8
9
V
CC  
E
20  
19  
Q
Q
0
0
1
1
2
2
3
3
7
7
6
D
D
Q
Q
D
D
Q
18 D  
17 D  
16 Q  
15 Q  
14 D  
6
5
5
4
13 D  
12  
Q
4
GND 10  
11 CP  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1675.1  
Copyright © Harris Corporation 1997  
1

CD74HC377E 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC377EE4 TI

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