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CD74HC365MT PDF预览

CD74HC365MT

更新时间: 2024-11-20 23:00:39
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
13页 282K
描述
High Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting

CD74HC365MT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:5.08
Is Samacsys:N其他特性:WITH DUAL OUTPUT ENABLE
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:HC/UHJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A湿度敏感等级:1
位数:6功能数量:1
端口数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260电源:2/6 V
Prop。Delay @ Nom-Sup:32 ns传播延迟(tpd):160 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.91 mmBase Number Matches:1

CD74HC365MT 数据手册

 浏览型号CD74HC365MT的Datasheet PDF文件第2页浏览型号CD74HC365MT的Datasheet PDF文件第3页浏览型号CD74HC365MT的Datasheet PDF文件第4页浏览型号CD74HC365MT的Datasheet PDF文件第5页浏览型号CD74HC365MT的Datasheet PDF文件第6页浏览型号CD74HC365MT的Datasheet PDF文件第7页 
CD54/74HC365, CD54/74HCT365,  
CD54/74HC366  
Data sheet acquired from Harris Semiconductor  
SCHS180C  
High Speed CMOS Logic Hex Buffer/Line Driver,  
Three-State Non-Inverting and Inverting  
November 1997 - Revised October 2003  
low power Schottky TTL circuits. Both circuits are capable of  
driving up to 15 low power Schottky inputs.  
Features  
• Buffered Inputs  
The ’HC365 and ’HCT365 are non-inverting buffers, whereas  
the ’HC366 is an inverting buffer. These devices have two  
three-state control inputs (OE1 and OE2) which are NORed  
• High Current Bus Driver Outputs  
[ /Title  
(CD74  
HC365  
,
CD74  
HCT36  
5,  
CD74  
HC366  
,
CD74  
HCT36  
6)  
• Typical Propagation Delay t  
, t  
= 8ns at V = 5V,  
CC  
PLH PHL  
together to control all six gates.  
o
C = 15pF, T = 25 C  
L
A
The ’HCT365 logic families are speed, function and pin  
compatible with the standard LS logic family.  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC365F3A  
CD54HC366F3A  
CD54HCT365F3A  
CD74HC365E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
- 2V to 6V Operation  
CD74HC365M  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
/Sub-  
ject  
(High  
Speed  
at V  
= 5V  
CD74HC365MT  
CD74HC365M96  
CD74HC366E  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
CD74HC366M  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
CD74HC366M96  
CD74HCT365E  
CD74HCT365M  
CD74HCT365MT  
CD74HCT365M96  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
Description  
The ’HC365, ’HCT365, and ’HC366 silicon gate CMOS three-  
state buffers are general purpose high-speed non-inverting  
and inverting buffers. They have high drive current outputs  
which enable high speed operation even when driving large  
bus capacitances. These circuits possess the low power  
dissipation of CMOS circuitry, yet have speeds comparable to  
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and real. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
CD54HC365, CD54HCT365, CD54HC366  
(CERDIP)  
CD74HC365, CD74HCT365, CD74HC366  
(PDIP, SOIC)  
TOP VIEW  
OE1  
1A  
1
2
3
4
5
6
7
8
16 V  
CC  
15 OE2  
14 6A  
(1Y) 1Y  
2A  
13 6Y (6Y)  
12 5A  
(2Y) 2Y  
3A  
11 5Y (5Y)  
10 4A  
(3Y) 3Y  
GND  
9
4Y (4Y)  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HC365MT 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC365M96E4 TI

完全替代

High Speed CMOS Logic Hex Buffer/Line Driver Three-State Non-Inverting and Inverting
CD74HC365M TI

完全替代

High Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting
SN74HC365D TI

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