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CD74HC175 PDF预览

CD74HC175

更新时间: 2024-10-31 23:04:27
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德州仪器 - TI 触发器
页数 文件大小 规格书
7页 57K
描述
High Speed CMOS Logic Quad D-Type Flip-Flop with Reset

CD74HC175 数据手册

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CD74HC175,  
CD74HCT175  
Data sheet acquired from Harris Semiconductor  
SCHS160  
High Speed CMOS Logic  
August 1997  
Quad D-Type Flip-Flop with Reset  
Features  
Description  
• Common Clock and Asynchronous Reset on Four  
D-Type Flip-Flops  
The Harris CD74HC175 and CD74HCT175 are high speed  
Quad D-type Flip-Flops with individual D-inputs and Q, Q  
complementary outputs. The devices are fabricated using  
silicon gate CMOS technology. They have the low power  
consumption advantage of standard CMOS ICs and the  
ability to drive 10 LSTTL devices.  
[ /Title  
(CD74  
HC175  
,
• Positive Edge Pulse Triggering  
• Complementary Outputs  
• Buffered Inputs  
Information at the D input is transferred to the Q, Q outputs on  
the positive going edge of the clock pulse. All four Flip-Flops  
are controlled by a common clock (CP) and a common reset  
(MR). Resetting is accomplished by a low voltage level  
independent of the clock. All four Q outputs are reset to a  
logic 0 and all four Q outputs to a logic 1.  
CD74  
HCT17  
5)  
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic  
Quad  
D-  
• Typical f  
MAX  
= 50MHz at V = 5V, C = 15pF,  
CC L  
o
T = 25 C  
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
TEMP. RANGE  
PKG.  
NO.  
o
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
PART NUMBER  
CD74HC175E  
CD74HCT175E  
CD74HC175M  
CD74HCT175M  
CD74HCT175W  
NOTES:  
( C)  
PACKAGE  
16 Ld PDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
Wafer  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
E16.3  
• HC Types  
- 2V to 6V Operation  
E16.3  
Type  
Flip-  
- High Noise Immunity: N = 30%, N = 30% of V  
CC  
IL  
IH  
M16.15  
M16.15  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL  
IH  
- CMOS Input Compatibility, I 1µA at V , V  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
l
OL OH  
2. Die for this part number is available which meets all electrical  
specifications. Please contact your local sales office or Harris  
customer service for ordering information.  
Pinout  
CD74HC175, CD74HCT175  
(PDIP, SOIC)  
TOP VIEW  
MR  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC  
Q
Q
0
3
3
3
2
Q
D
D
Q
Q
Q
0
0
1
1
1
D
D
Q
Q
2
2
CP  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1474.1  
Copyright © Harris Corporation 1997  
1

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