CD54HC174, CD74HC174,
CD54HCT174, CD74HCT174
Data sheet acquired from Harris Semiconductor
SCHS159C
High-Speed CMOS Logic
Hex D-Type Flip-Flop with Reset
August 1997 - Revised October 2003
times is transferred to the Q output on the low to high
transition of the CLOCK input. The MR input, when low, sets
all outputs to a low state.
Features
• Buffered Positive Edge Triggered Clock
• Asynchronous Common Reset
[ /Title
(CD74
HC174
,
CD74
HCT17
4)
Each output can drive ten low power Schottky TTL
equivalent loads. The ’HCT174 is functional as well as, pin
compatible to the ’LS174.
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Ordering Information
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
TEMP. RANGE
o
PART NUMBER
CD54HC174F3A
CD54HCT174F3A
CD74HC174E
( C)
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
• Significant Power Reduction Compared to LSTTL
Logic ICs
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
/Sub-
ject
• HC Types
- 2V to 6V Operation
(High
Speed
CMOS
Logic
Hex D-
Type
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
at V
= 5V
CC
CD74HC174M
• HCT Types
- 4.5V to 5.5V Operation
CD74HC174MT
CD74HC174M96
CD74HCT174E
CD74HCT174M
CD74HCT174MT
CD74HCT174M96
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL
IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
Flip-
Flop
l
OL OH
Description
The ’HC174 and ’HCT174 are edge triggered flip-flops which
utilize silicon gate CMOS circuitry to implement D-type flip-
flops. They possess low power and speeds comparable to low
power Schottky TTL circuits. The devices contain six master-
slave flip-flops with a common clock and common reset.
Data on the D input having the specified setup and hold
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
Pinout
CD54HC174, CD54HCT174
(CERDIP)
CD74HC174, CD74HCT174
(PDIP, SOIC)
TOP VIEW
MR
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
Q
Q
0
5
5
4
D
D
Q
D
Q
D
D
0
1
1
2
2
Q
4
D
3
Q
3
CP
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1