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CD74HC132EE4 PDF预览

CD74HC132EE4

更新时间: 2024-11-01 05:18:11
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
15页 336K
描述
High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger

CD74HC132EE4 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.15Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PDIP-T14
JESD-609代码:e4长度:19.3 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.0052 A功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
最大电源电流(ICC):0.04 mAProp。Delay @ Nom-Sup:38 ns
传播延迟(tpd):188 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.35 mmBase Number Matches:1

CD74HC132EE4 数据手册

 浏览型号CD74HC132EE4的Datasheet PDF文件第2页浏览型号CD74HC132EE4的Datasheet PDF文件第3页浏览型号CD74HC132EE4的Datasheet PDF文件第4页浏览型号CD74HC132EE4的Datasheet PDF文件第5页浏览型号CD74HC132EE4的Datasheet PDF文件第6页浏览型号CD74HC132EE4的Datasheet PDF文件第7页 
CD54HC132, CD74HC132,  
CD54HCT132, CD74HCT132  
Data sheet acquired from Harris Semiconductor  
SCHS145E  
High-Speed CMOS Logic  
Quad 2-Input NAND Schmitt Trigger  
August 1997 - Revised March 2004  
Features  
Description  
• Unlimited Input Rise and Fall Times  
• Exceptionally High Noise Immunity  
• Typical Propagation Delay: 10ns at V  
The ’HC132 and ’HCT132 each contain four 2-input NAND  
Schmitt Triggers in one package. This logic device utilizes  
silicon gate CMOS technology to achieve operating speeds  
similar to LSTTL gates with the low power consumption of  
standard CMOS integrated circuits. All devices have the  
ability to drive 10 LSTTL loads. The HCT logic family is  
functionally pin compatible with the standard LS logic family.  
[ /Title  
(CD74  
HC132  
,
= 5V,  
CC  
o
C = 15pF, T = 25 C  
L
A
• Fanout (Over Temperature Range)  
CD74  
HCT13  
2)  
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic  
Quad  
2-Input  
NAND  
Schmit  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC132F3A  
CD54HCT132F3A  
CD74HC132E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
- 2V to 6V Operation  
CD74HC132M  
- High Noise Immunity: N = 37%, N = 51% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC132MT  
CD74HC132M96  
CD74HCT132E  
CD74HCT132M  
CD74HCT132MT  
CD74HCT132M96  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
CD54HC132, CD54HCT132  
(CERDIP)  
CD74HC132, CD74HCT132  
(PDIP, SOIC)  
TOP VIEW  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 4B  
12 4A  
11 4Y  
10 3B  
1Y  
2A  
2B  
2Y  
9
8
3A  
3Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2004, Texas Instruments Incorporated  
1

CD74HC132EE4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC132E TI

完全替代

High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger

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