生命周期: | Contact Manufacturer | 包装说明: | SOP, |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.59 | Is Samacsys: | N |
系列: | HC/UH | JESD-30 代码: | R-PDSO-G16 |
长度: | 10.2 mm | 逻辑集成电路类型: | J-K FLIP-FLOP |
位数: | 2 | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | SOP |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
传播延迟(tpd): | 265 ns | 座面最大高度: | 2 mm |
最大供电电压 (Vsup): | 6 V | 最小供电电压 (Vsup): | 2 V |
标称供电电压 (Vsup): | 4.5 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | MILITARY |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 触发器类型: | NEGATIVE EDGE |
宽度: | 5.3 mm | 最小 fmax: | 23 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CD74HC112NSRG4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PW | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWE4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWG4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWR | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWRE4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWRG4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWT | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWTE4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWTG | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,TSSOP,16PIN,PLASTIC |