是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Obsolete | 零件包装代码: | SOIC |
包装说明: | SOP, SOP16,.25 | 针数: | 16 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.33 | 系列: | HC/UH |
JESD-30 代码: | R-PDSO-G16 | JESD-609代码: | e4 |
长度: | 9.9 mm | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | J-K FLIP-FLOP | 最大频率@ Nom-Sup: | 20000000 Hz |
最大I(ol): | 0.004 A | 湿度敏感等级: | 1 |
位数: | 2 | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | SOP |
封装等效代码: | SOP16,.25 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 包装方法: | TAPE AND REEL |
峰值回流温度(摄氏度): | 260 | 电源: | 2/6 V |
传播延迟(tpd): | 265 ns | 认证状态: | Not Qualified |
座面最大高度: | 1.75 mm | 子类别: | FF/Latches |
最大供电电压 (Vsup): | 6 V | 最小供电电压 (Vsup): | 2 V |
标称供电电压 (Vsup): | 4.5 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | MILITARY |
端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) | 端子形式: | GULL WING |
端子节距: | 1.27 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 触发器类型: | NEGATIVE EDGE |
宽度: | 3.9 mm | 最小 fmax: | 23 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CD74HC112MTG4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112NSR | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112NSR96 | ETC |
获取价格 |
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|SOP|16PIN|PLASTIC | |
CD74HC112NSRE4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112NSRE4 | ROCHESTER |
获取价格 |
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, | |
CD74HC112NSRG4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PW | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWE4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWG4 | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | |
CD74HC112PWR | TI |
获取价格 |
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger |