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CD74FCT574M PDF预览

CD74FCT574M

更新时间: 2024-01-11 17:58:26
品牌 Logo 应用领域
德州仪器 - TI 触发器逻辑集成电路光电二极管驱动
页数 文件大小 规格书
5页 31K
描述
BiCMOS FCT Interface Logic, Octal D-Type Flip-Flops, Three-State

CD74FCT574M 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.7其他特性:BROADSIDE VERSION OF 374
系列:FCTJESD-30 代码:R-PDSO-G20
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.048 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:10 ns
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

CD74FCT574M 数据手册

 浏览型号CD74FCT574M的Datasheet PDF文件第2页浏览型号CD74FCT574M的Datasheet PDF文件第3页浏览型号CD74FCT574M的Datasheet PDF文件第4页浏览型号CD74FCT574M的Datasheet PDF文件第5页 
CD74FCT564,  
CD74FCT574  
Data sheet acquired from Harris Semiconductor  
SCHS259  
BiCMOS FCT Interface Logic,  
January 1997  
Octal D-Type Flip-Flops, Three-State  
Features  
Description  
• Buffered Inputs  
The CD74FCT564 and CD74FCT574 are octal D-Type,  
three-state, positive edge triggered flip-flops which use a  
small geometry BiCMOS technology. The output stage is a  
combination of bipolar and CMOS transistors that limits the  
• Typical Propagation Delay: 5.6ns at V  
o
= 5V,  
CC  
T = 25 C  
A
output HIGH level to two diode drops below V . This result-  
ant lowering of output swing (0V to 3.7V) reduces power bus  
• Positive Edge Triggered  
CC  
• CD74FCT564  
- Inverting  
ringing (a source of EMI) and minimizes V  
bounce and  
CC  
ground bounce and their effects during simultaneous output  
switching. The output configuration also enhances switching  
speed and is capable of sinking 48 milliamperes.  
• CD74FCT574  
- Noninverting  
The eight flip-flops enter data into their registers on the LOW  
to HIGH transition of the clock (CP). The Output Enable (OE)  
controls the three state outputs and is independent of the  
register operation. When the Output Enable (OE) is HIGH,  
the outputs are in the high impedance state. The  
CD74FCT564 and CD74FCT574 share the same configura-  
tions; the CD74FCT564, however, has inverted outputs and  
the CD74FCT574 has noninverted outputs.  
• SCR Latchup Resistant BiCMOS Process and  
Circuit Design  
• Speed of Bipolar FAST™/AS/S  
• 48mA Output Sink Current  
• Output Voltage Swing Limited to 3.7V at V  
• Controlled Output Edge Rates  
= 5V  
CC  
• Input/Output Isolation to V  
CC  
Ordering Information  
• BiCMOS Technology with Low Quiescent Power  
TEMP.  
RANGE ( C)  
PKG.  
NO.  
o
PART NUMBER  
CD74FCT564E  
CD74FCT574E  
CD74FCT564M  
CD74FCT574M  
CD74FCT574SM  
PACKAGE  
20 Ld PDIP  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld SSOP  
0 to 70  
E20.3  
0 to 70  
E20.3  
0 to 70  
M20.3  
M20.3  
M20.209  
0 to 70  
0 to 70  
NOTE: When ordering the suffix M and SM packages, use the entire  
part number. Add the suffix 96 to obtain the variant in the tape and reel.  
Pinouts  
CD74FCT564  
(PDIP, SOIC, SSOP)  
TOP VIEW  
CD74FCT574  
(PDIP, SOIC, SSOP)  
TOP VIEW  
1
2
3
4
5
6
7
8
9
V
1
2
3
4
5
6
7
8
9
V
OE  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
20  
19  
OE  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
20  
19  
CC  
CC  
Q0  
Q0  
18 Q1  
17 Q2  
16 Q3  
15 Q4  
14 Q5  
13 Q6  
18 Q1  
17 Q2  
16 Q3  
15 Q4  
14 Q5  
13 Q6  
12  
12  
Q7  
Q7  
GND 10  
11 CP  
GND 10  
11 CP  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
FAST™ is a trademark of Fairchild Semiconductor.  
Copyright © Harris Corporation 1997  
File Number 2295.2  
8-1  

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